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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Paul Burton7fb05072013-11-08 11:18:49 +00002/*
3 * Copyright (C) 2013 Imagination Technologies
Paul Burtonb8551b92017-10-30 16:58:21 -07004 * Author: Paul Burton <paul.burton@mips.com>
Paul Burton7fb05072013-11-08 11:18:49 +00005 *
6 * Setup code for the FDC37M817 super I/O controller
Paul Burton7fb05072013-11-08 11:18:49 +00007 */
8
Paul Burton7fb05072013-11-08 11:18:49 +00009#include <asm/io.h>
10
11#define SIO_CONF_PORT 0x3f0
12#define SIO_DATA_PORT 0x3f1
13
14enum sio_conf_key {
15 SIOCONF_DEVNUM = 0x07,
16 SIOCONF_ACTIVATE = 0x30,
17 SIOCONF_ENTER_SETUP = 0x55,
18 SIOCONF_BASE_HIGH = 0x60,
19 SIOCONF_BASE_LOW = 0x61,
20 SIOCONF_PRIMARY_INT = 0x70,
21 SIOCONF_EXIT_SETUP = 0xaa,
22 SIOCONF_MODE = 0xf0,
23};
24
25static struct {
26 u8 key;
27 u8 data;
28} sio_config[] = {
29 /* tty0 */
30 { SIOCONF_DEVNUM, 0x04 },
31 { SIOCONF_BASE_HIGH, 0x03 },
32 { SIOCONF_BASE_LOW, 0xf8 },
33 { SIOCONF_MODE, 0x02 },
34 { SIOCONF_PRIMARY_INT, 0x04 },
35 { SIOCONF_ACTIVATE, 0x01 },
36
37 /* tty1 */
38 { SIOCONF_DEVNUM, 0x05 },
39 { SIOCONF_BASE_HIGH, 0x02 },
40 { SIOCONF_BASE_LOW, 0xf8 },
41 { SIOCONF_MODE, 0x02 },
42 { SIOCONF_PRIMARY_INT, 0x03 },
43 { SIOCONF_ACTIVATE, 0x01 },
44};
45
Paul Burtondd37a142016-01-29 13:54:54 +000046void malta_superio_init(void)
Paul Burton7fb05072013-11-08 11:18:49 +000047{
48 unsigned i;
49
50 /* enter config state */
Paul Burtondd37a142016-01-29 13:54:54 +000051 outb(SIOCONF_ENTER_SETUP, SIO_CONF_PORT);
Paul Burton7fb05072013-11-08 11:18:49 +000052
53 /* configure peripherals */
54 for (i = 0; i < ARRAY_SIZE(sio_config); i++) {
Paul Burtondd37a142016-01-29 13:54:54 +000055 outb(sio_config[i].key, SIO_CONF_PORT);
56 outb(sio_config[i].data, SIO_DATA_PORT);
Paul Burton7fb05072013-11-08 11:18:49 +000057 }
58
59 /* exit config state */
Paul Burtondd37a142016-01-29 13:54:54 +000060 outb(SIOCONF_EXIT_SETUP, SIO_CONF_PORT);
Paul Burton7fb05072013-11-08 11:18:49 +000061}