blob: d51ae241e85cd5fd0646dba2f2a5a6ab607eab57 [file] [log] [blame]
Jagan Teki35049fe2021-04-26 18:23:48 +05301// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2020 Engicam s.r.l.
4 * Copyright (C) 2020 Amarula Solutions(India)
5 * Author: Jagan Teki <jagan@amarulasolutions.com>
6 */
7
Jagan Teki35049fe2021-04-26 18:23:48 +05308#include <hang.h>
9#include <init.h>
10#include <log.h>
11#include <spl.h>
12#include <asm/mach-imx/iomux-v3.h>
13#include <asm/arch/clock.h>
14#include <asm/arch/imx8mm_pins.h>
15#include <asm/arch/sys_proto.h>
16#include <asm/mach-imx/boot_mode.h>
17#include <asm/arch/ddr.h>
Shiji Yangbb112342023-08-03 09:47:16 +080018#include <asm/sections.h>
Jagan Teki35049fe2021-04-26 18:23:48 +053019
20DECLARE_GLOBAL_DATA_PTR;
21
22int spl_board_boot_device(enum boot_device boot_dev_spl)
23{
24 switch (boot_dev_spl) {
25 case SD1_BOOT:
26 case SD2_BOOT:
27 case MMC2_BOOT:
28 return BOOT_DEVICE_MMC1;
29 case SD3_BOOT:
30 case MMC3_BOOT:
31 return BOOT_DEVICE_MMC2;
32 default:
33 return BOOT_DEVICE_NONE;
34 }
35}
36
37static void spl_dram_init(void)
38{
39 ddr_init(&dram_timing);
40}
41
42void spl_board_init(void)
43{
44 debug("Normal Boot\n");
45}
46
47#ifdef CONFIG_SPL_LOAD_FIT
48int board_fit_config_name_match(const char *name)
49{
50 /* Just empty function now - can't decide what to choose */
51 debug("%s: %s\n", __func__, name);
52
53 return 0;
54}
55#endif
56
Jagan Teki35049fe2021-04-26 18:23:48 +053057int board_early_init_f(void)
58{
Peng Fan9f777272022-06-11 20:20:57 +080059 return 0;
Jagan Teki35049fe2021-04-26 18:23:48 +053060}
61
62void board_init_f(ulong dummy)
63{
64 int ret;
65
66 arch_cpu_init();
67
68 init_uart_clk(1);
69
70 board_early_init_f();
71
72 timer_init();
73
Jagan Teki35049fe2021-04-26 18:23:48 +053074 /* Clear the BSS. */
75 memset(__bss_start, 0, __bss_end - __bss_start);
76
77 ret = spl_early_init();
78 if (ret) {
79 debug("spl_early_init() failed: %d\n", ret);
80 hang();
81 }
82
Peng Fan9f777272022-06-11 20:20:57 +080083 preloader_console_init();
84
Jagan Teki35049fe2021-04-26 18:23:48 +053085 enable_tzc380();
86
87 /* DDR initialization */
88 spl_dram_init();
89
90 board_init_r(NULL, 0);
91}