blob: 5651d516a9e3a049e8ef4dcd016424a1e2482629 [file] [log] [blame]
Michal Simekd903ce42024-05-29 16:47:58 +02001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 - 2022, Xilinx, Inc.
4 * Copyright (C) 2022 - 2024, Advanced Micro Devices, Inc.
5 *
6 * Michal Simek <michal.simek@amd.com>
7 */
8
9#include <cpu_func.h>
10#include <fdtdec.h>
11#include <init.h>
12#include <env_internal.h>
13#include <log.h>
14#include <malloc.h>
15#include <time.h>
16#include <asm/cache.h>
17#include <asm/global_data.h>
18#include <asm/io.h>
19#include <asm/arch/hardware.h>
20#include <asm/arch/sys_proto.h>
21#include <dm/device.h>
22#include <dm/uclass.h>
23#include "../../xilinx/common/board.h"
24
25#include <linux/bitfield.h>
26#include <debug_uart.h>
27#include <generated/dt.h>
28
29DECLARE_GLOBAL_DATA_PTR;
30
31int board_init(void)
32{
33 printf("EL Level:\tEL%d\n", current_el());
34
35 return 0;
36}
37
38static u32 platform_id, platform_version;
39
40char *soc_name_decode(void)
41{
42 char *name, *platform_name;
43
44 switch (platform_id) {
45 case VERSAL2_SPP:
46 platform_name = "spp";
47 break;
48 case VERSAL2_EMU:
49 platform_name = "emu";
50 break;
51 case VERSAL2_SPP_MMD:
52 platform_name = "spp-mmd";
53 break;
54 case VERSAL2_EMU_MMD:
55 platform_name = "emu-mmd";
56 break;
57 case VERSAL2_QEMU:
58 platform_name = "qemu";
59 break;
60 default:
61 return NULL;
62 }
63
64 /*
65 * --rev. are 6 chars
66 * max platform name is qemu which is 4 chars
67 * platform version number are 1+1
68 * Plus 1 char for \n
69 */
70 name = calloc(1, strlen(CONFIG_SYS_BOARD) + 13);
71 if (!name)
72 return NULL;
73
74 sprintf(name, "%s-%s-rev%d.%d-el%d", CONFIG_SYS_BOARD,
75 platform_name, platform_version / 10,
76 platform_version % 10, current_el());
77
78 return name;
79}
80
81bool soc_detection(void)
82{
83 u32 version, ps_version;
84
85 version = readl(PMC_TAP_VERSION);
86 platform_id = FIELD_GET(PLATFORM_MASK, version);
87 ps_version = FIELD_GET(PS_VERSION_MASK, version);
88
89 debug("idcode %x, version %x, usercode %x\n",
90 readl(PMC_TAP_IDCODE), version,
91 readl(PMC_TAP_USERCODE));
92
93 debug("pmc_ver %lx, ps version %x, rtl version %lx\n",
94 FIELD_GET(PMC_VERSION_MASK, version),
95 ps_version,
96 FIELD_GET(RTL_VERSION_MASK, version));
97
98 platform_version = FIELD_GET(PLATFORM_VERSION_MASK, version);
99
100 debug("Platform id: %d version: %d.%d\n", platform_id,
101 platform_version / 10, platform_version % 10);
102
103 return true;
104}
105
106int board_early_init_r(void)
107{
108 u32 val;
109
110 if (current_el() != 3)
111 return 0;
112
113 debug("iou_switch ctrl div0 %x\n",
114 readl(&crlapb_base->iou_switch_ctrl));
115
116 writel(IOU_SWITCH_CTRL_CLKACT_BIT |
117 (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
118 &crlapb_base->iou_switch_ctrl);
119
120 /* Global timer init - Program time stamp reference clk */
121 val = readl(&crlapb_base->timestamp_ref_ctrl);
122 val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
123 writel(val, &crlapb_base->timestamp_ref_ctrl);
124
125 debug("ref ctrl 0x%x\n",
126 readl(&crlapb_base->timestamp_ref_ctrl));
127
128 /* Clear reset of timestamp reg */
129 writel(0, &crlapb_base->rst_timestamp);
130
131 /*
132 * Program freq register in System counter and
133 * enable system counter.
134 */
135 writel(CONFIG_COUNTER_FREQUENCY,
136 &iou_scntr_secure->base_frequency_id_register);
137
138 debug("counter val 0x%x\n",
139 readl(&iou_scntr_secure->base_frequency_id_register));
140
141 writel(IOU_SCNTRS_CONTROL_EN,
142 &iou_scntr_secure->counter_control_register);
143
144 debug("scntrs control 0x%x\n",
145 readl(&iou_scntr_secure->counter_control_register));
146 debug("timer 0x%llx\n", get_ticks());
147 debug("timer 0x%llx\n", get_ticks());
148
149 return 0;
150}
151
152static u8 versal_net_get_bootmode(void)
153{
154 u8 bootmode;
155 u32 reg = 0;
156
157 reg = readl(&crp_base->boot_mode_usr);
158
159 if (reg >> BOOT_MODE_ALT_SHIFT)
160 reg >>= BOOT_MODE_ALT_SHIFT;
161
162 bootmode = reg & BOOT_MODES_MASK;
163
164 return bootmode;
165}
166
167static int boot_targets_setup(void)
168{
169 u8 bootmode;
170 struct udevice *dev;
171 int bootseq = -1;
172 int bootseq_len = 0;
173 int env_targets_len = 0;
174 const char *mode = NULL;
175 char *new_targets;
176 char *env_targets;
177
178 bootmode = versal_net_get_bootmode();
179
180 puts("Bootmode: ");
181 switch (bootmode) {
182 case USB_MODE:
183 puts("USB_MODE\n");
184 mode = "usb_dfu0 usb_dfu1";
185 break;
186 case JTAG_MODE:
187 puts("JTAG_MODE\n");
188 mode = "jtag pxe dhcp";
189 break;
190 case QSPI_MODE_24BIT:
191 puts("QSPI_MODE_24\n");
192 if (uclass_get_device_by_name(UCLASS_SPI,
193 "spi@f1030000", &dev)) {
194 debug("QSPI driver for QSPI device is not present\n");
195 break;
196 }
197 mode = "xspi";
198 bootseq = dev_seq(dev);
199 break;
200 case QSPI_MODE_32BIT:
201 puts("QSPI_MODE_32\n");
202 if (uclass_get_device_by_name(UCLASS_SPI,
203 "spi@f1030000", &dev)) {
204 debug("QSPI driver for QSPI device is not present\n");
205 break;
206 }
207 mode = "xspi";
208 bootseq = dev_seq(dev);
209 break;
210 case OSPI_MODE:
211 puts("OSPI_MODE\n");
212 if (uclass_get_device_by_name(UCLASS_SPI,
213 "spi@f1010000", &dev)) {
214 debug("OSPI driver for OSPI device is not present\n");
215 break;
216 }
217 mode = "xspi";
218 bootseq = dev_seq(dev);
219 break;
220 case EMMC_MODE:
221 puts("EMMC_MODE\n");
222 mode = "mmc";
223 bootseq = dev_seq(dev);
224 break;
225 case SELECTMAP_MODE:
226 puts("SELECTMAP_MODE\n");
227 break;
228 case SD_MODE:
229 puts("SD_MODE\n");
230 if (uclass_get_device_by_name(UCLASS_MMC,
231 "mmc@f1040000", &dev)) {
232 debug("SD0 driver for SD0 device is not present\n");
233 break;
234 }
235 debug("mmc0 device found at %p, seq %d\n", dev, dev_seq(dev));
236
237 mode = "mmc";
238 bootseq = dev_seq(dev);
239 break;
240 case SD1_LSHFT_MODE:
241 puts("LVL_SHFT_");
242 fallthrough;
243 case SD_MODE1:
244 puts("SD_MODE1\n");
245 if (uclass_get_device_by_name(UCLASS_MMC,
246 "mmc@f1050000", &dev)) {
247 debug("SD1 driver for SD1 device is not present\n");
248 break;
249 }
250 debug("mmc1 device found at %p, seq %d\n", dev, dev_seq(dev));
251
252 mode = "mmc";
253 bootseq = dev_seq(dev);
254 break;
255 default:
256 printf("Invalid Boot Mode:0x%x\n", bootmode);
257 break;
258 }
259
260 if (mode) {
261 if (bootseq >= 0) {
262 bootseq_len = snprintf(NULL, 0, "%i", bootseq);
263 debug("Bootseq len: %x\n", bootseq_len);
264 }
265
266 /*
267 * One terminating char + one byte for space between mode
268 * and default boot_targets
269 */
270 env_targets = env_get("boot_targets");
271 if (env_targets)
272 env_targets_len = strlen(env_targets);
273
274 new_targets = calloc(1, strlen(mode) + env_targets_len + 2 +
275 bootseq_len);
276 if (!new_targets)
277 return -ENOMEM;
278
279 if (bootseq >= 0)
280 sprintf(new_targets, "%s%x %s", mode, bootseq,
281 env_targets ? env_targets : "");
282 else
283 sprintf(new_targets, "%s %s", mode,
284 env_targets ? env_targets : "");
285
286 env_set("boot_targets", new_targets);
287 }
288
289 return 0;
290}
291
292int board_late_init(void)
293{
294 int ret;
295
296 if (!(gd->flags & GD_FLG_ENV_DEFAULT)) {
297 debug("Saved variables - Skipping\n");
298 return 0;
299 }
300
301 if (!IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG))
302 return 0;
303
304 if (IS_ENABLED(CONFIG_DISTRO_DEFAULTS)) {
305 ret = boot_targets_setup();
306 if (ret)
307 return ret;
308 }
309
310 return board_late_init_xilinx();
311}
312
313int dram_init_banksize(void)
314{
315 int ret;
316
317 ret = fdtdec_setup_memory_banksize();
318 if (ret)
319 return ret;
320
321 mem_map_fill();
322
323 return 0;
324}
325
326int dram_init(void)
327{
328 int ret;
329
330 if (IS_ENABLED(CONFIG_SYS_MEM_RSVD_FOR_MMU))
331 ret = fdtdec_setup_mem_size_base();
332 else
333 ret = fdtdec_setup_mem_size_base_lowest();
334
335 if (ret)
336 return -EINVAL;
337
338 return 0;
339}
340
341void reset_cpu(void)
342{
343}