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git01.mediatek.com / filogic / uboot / f92b6facca24bb642f60665d4f9747055e0f10bb / . / configs / miqi-rk3288_defconfig
blob: 234ced5ab064fc85eeb91acb93877cdcc49b6992 [file] [log] [blame]
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ROCKCHIP=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x00000000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]4CONFIG_NR_DRAM_BANKS=1
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]5CONFIG_ENV_OFFSET=0x3F8000
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]6CONFIG_SPL_TEXT_BASE=0xff704000
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]7CONFIG_ROCKCHIP_RK3288=y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200[diff] [blame]8CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]9CONFIG_TARGET_MIQI_RK3288=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]10CONFIG_SPL_STACK_R_ADDR=0x80000
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]11CONFIG_DEBUG_UART_BASE=0xff690000
12CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi"
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]14CONFIG_DEBUG_UART=y
Tom Rinib5bf5622017-08-25 17:50:27 -0400[diff] [blame]15# CONFIG_ANDROID_BOOT_IMAGE is not set
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]16CONFIG_USE_PREBOOT=y
Klaus Goger2b6b4f22018-05-25 23:45:05 +0200[diff] [blame]17CONFIG_DEFAULT_FDT_FILE="rk3288-miqi.dtb"
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame^]18CONFIG_SILENT_CONSOLE=y
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]19CONFIG_DISPLAY_BOARDINFO_LATE=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]20CONFIG_SPL_STACK_R=y
21CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]22CONFIG_CMD_GPIO=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]23CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]24CONFIG_CMD_I2C=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]25CONFIG_CMD_MMC=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]26CONFIG_CMD_SPI=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]27CONFIG_CMD_USB=y
Urja Rannikko17dd9d32019-05-13 13:51:04 +0000[diff] [blame]28CONFIG_CMD_USB_MASS_STORAGE=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]29# CONFIG_CMD_SETEXPR is not set
30CONFIG_CMD_CACHE=y
31CONFIG_CMD_TIME=y
32CONFIG_CMD_PMIC=y
33CONFIG_CMD_REGULATOR=y
34# CONFIG_SPL_DOS_PARTITION is not set
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]35# CONFIG_SPL_EFI_PARTITION is not set
36CONFIG_SPL_PARTITION_UUIDS=y
37CONFIG_SPL_OF_CONTROL=y
38CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]39CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]40CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]41CONFIG_NET_RANDOM_ETHADDR=y
42CONFIG_REGMAP=y
43CONFIG_SPL_REGMAP=y
44CONFIG_SYSCON=y
45CONFIG_SPL_SYSCON=y
46# CONFIG_SPL_SIMPLE_BUS is not set
47CONFIG_CLK=y
48CONFIG_SPL_CLK=y
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]49CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]50CONFIG_ROCKCHIP_GPIO=y
51CONFIG_SYS_I2C_ROCKCHIP=y
52CONFIG_MMC_DW=y
53CONFIG_MMC_DW_ROCKCHIP=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]54CONFIG_MTD=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]55CONFIG_SF_DEFAULT_SPEED=20000000
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]56CONFIG_DM_ETH=y
57CONFIG_ETH_DESIGNWARE=y
58CONFIG_GMAC_ROCKCHIP=y
59CONFIG_PINCTRL=y
60CONFIG_SPL_PINCTRL=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]61CONFIG_DM_PMIC=y
62CONFIG_PMIC_ACT8846=y
63CONFIG_REGULATOR_ACT8846=y
64CONFIG_DM_REGULATOR_FIXED=y
65CONFIG_PWM_ROCKCHIP=y
66CONFIG_RAM=y
67CONFIG_SPL_RAM=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]68CONFIG_DEBUG_UART_SHIFT=2
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]69CONFIG_SYSRESET=y
70CONFIG_USB=y
Philipp Tomsich54983812017-07-03 18:30:06 +0200[diff] [blame]71CONFIG_USB_DWC2=y
Adam Fordd4183d62018-01-02 10:39:52 -0600[diff] [blame]72CONFIG_ROCKCHIP_USB2_PHY=y
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]73CONFIG_USB_KEYBOARD=y
Tom Rini504997e2017-08-25 17:50:26 -0400[diff] [blame]74CONFIG_USB_GADGET=y
75CONFIG_USB_GADGET_DWC2_OTG=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]76CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]77CONFIG_USB_ETHER_ASIX=y
78CONFIG_USB_ETHER_SMSC95XX=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]79CONFIG_DM_VIDEO=y
Anatolij Gustschindba36702020-02-04 22:43:06 +0100[diff] [blame]80# CONFIG_VIDEO_BPP8 is not set
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]81CONFIG_DISPLAY=y
82CONFIG_VIDEO_ROCKCHIP=y
eric.gao@rock-chips.com735ddea2017-04-17 22:24:23 +0800[diff] [blame]83CONFIG_DISPLAY_ROCKCHIP_HDMI=y
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]84CONFIG_CONSOLE_SCROLL_LINES=10
Jernej Skrabec971e53a2017-03-30 01:23:14 +0200[diff] [blame]85CONFIG_CMD_DHRYSTONE=y
86CONFIG_ERRNO_STR=y