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git01.mediatek.com / filogic / uboot / f912a72595fa4e3bf55f2788183f9481b7165ac7 / . / include / configs / devkit3250.h
blob: 7916ca8a6cd4c131cf7550cb50ef962ef482b603 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]2/*
3 * Embest/Timll DevKit3250 board configuration file
4 *
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]5 * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]6 */
7
8#ifndef __CONFIG_DEVKIT3250_H__
9#define __CONFIG_DEVKIT3250_H__
10
11/* SoC and board defines */
Alexey Brodkin267d8e22014-02-26 17:47:58 +0400[diff] [blame]12#include <linux/sizes.h>
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]13#include <asm/arch/cpu.h>
14
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]15/*
16 * Memory configurations
17 */
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]18#define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
19#define CONFIG_SYS_SDRAM_SIZE SZ_64M
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]20
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]21/*
Vladimir Zapolskiy936c2002015-12-19 23:41:23 +0200[diff] [blame]22 * DMA
23 */
Vladimir Zapolskiy936c2002015-12-19 23:41:23 +0200[diff] [blame]24
25/*
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]26 * GPIO
27 */
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]28
29/*
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]30 * NOR Flash
31 */
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]32#define CONFIG_SYS_FLASH_BASE EMC_CS0_BASE
33#define CONFIG_SYS_FLASH_SIZE SZ_4M
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]34
35/*
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]36 * NAND controller
37 */
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]38#define CONFIG_SYS_NAND_BASE SLC_NAND_BASE
39#define CONFIG_SYS_MAX_NAND_DEVICE 1
40#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE }
41
42/*
43 * NAND chip timings
44 */
45#define CONFIG_LPC32XX_NAND_SLC_WDR_CLKS 14
46#define CONFIG_LPC32XX_NAND_SLC_WWIDTH 66666666
47#define CONFIG_LPC32XX_NAND_SLC_WHOLD 200000000
48#define CONFIG_LPC32XX_NAND_SLC_WSETUP 50000000
49#define CONFIG_LPC32XX_NAND_SLC_RDR_CLKS 14
50#define CONFIG_LPC32XX_NAND_SLC_RWIDTH 66666666
51#define CONFIG_LPC32XX_NAND_SLC_RHOLD 200000000
52#define CONFIG_LPC32XX_NAND_SLC_RSETUP 50000000
53
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]54/*
Vladimir Zapolskiy936c2002015-12-19 23:41:23 +0200[diff] [blame]55 * USB
56 */
Vladimir Zapolskiy936c2002015-12-19 23:41:23 +0200[diff] [blame]57#define CONFIG_USB_ISP1301_I2C_ADDR 0x2d
Vladimir Zapolskiy936c2002015-12-19 23:41:23 +0200[diff] [blame]58
59/*
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]60 * U-Boot General Configurations
61 */
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]62
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]63/*
64 * Pass open firmware flat tree
65 */
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]66
67/*
68 * Environment
69 */
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]70
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]71#define CONFIG_EXTRA_ENV_SETTINGS \
Vladimir Zapolskiy3704e432015-07-18 01:47:10 +0300[diff] [blame]72 "ethaddr=00:01:90:00:C0:81\0" \
73 "dtbaddr=0x81000000\0" \
74 "nfsroot=/opt/projects/images/vladimir/oe/devkit3250/rootfs\0" \
75 "tftpdir=vladimir/oe/devkit3250\0" \
76 "userargs=oops=panic\0"
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]77
78/*
79 * U-Boot Commands
80 */
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]81
Vladimir Zapolskiy89f86a22015-07-18 01:47:11 +0300[diff] [blame]82/* U-Boot will be 0x60000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
Vladimir Zapolskiy89f86a22015-07-18 01:47:11 +0300[diff] [blame]83#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x60000
84
85#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
86#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
87
88/* See common/spl/spl.c spl_set_header_raw_uboot() */
89#define CONFIG_SYS_MONITOR_LEN CONFIG_SYS_NAND_U_BOOT_SIZE
90
91/*
Vladimir Zapolskiy3ed0fcf2012-04-19 04:33:10 +0000[diff] [blame]92 * Include SoC specific configuration
93 */
94#include <asm/arch/config.h>
95
96#endif /* __CONFIG_DEVKIT3250_H__*/