Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2010 |
Mario Six | b489358 | 2018-03-06 08:04:58 +0100 | [diff] [blame] | 4 | * Dirk Eibach, Guntermann & Drunck GmbH, dirk.eibach@gdsys.cc |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <miiphy.h> |
| 9 | |
| 10 | #include <asm/io.h> |
| 11 | |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 12 | struct io_bb_pinset { |
| 13 | int mdio; |
| 14 | int mdc; |
| 15 | }; |
| 16 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 17 | static int io_bb_mii_init(struct bb_miiphy_bus *bus) |
| 18 | { |
| 19 | return 0; |
| 20 | } |
| 21 | |
| 22 | static int io_bb_mdio_active(struct bb_miiphy_bus *bus) |
| 23 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 24 | struct io_bb_pinset *pins = bus->priv; |
| 25 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 26 | out_be32((void *)GPIO0_TCR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 27 | in_be32((void *)GPIO0_TCR) | pins->mdio); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 28 | |
| 29 | return 0; |
| 30 | } |
| 31 | |
| 32 | static int io_bb_mdio_tristate(struct bb_miiphy_bus *bus) |
| 33 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 34 | struct io_bb_pinset *pins = bus->priv; |
| 35 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 36 | out_be32((void *)GPIO0_TCR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 37 | in_be32((void *)GPIO0_TCR) & ~pins->mdio); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 38 | |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | static int io_bb_set_mdio(struct bb_miiphy_bus *bus, int v) |
| 43 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 44 | struct io_bb_pinset *pins = bus->priv; |
| 45 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 46 | if (v) |
| 47 | out_be32((void *)GPIO0_OR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 48 | in_be32((void *)GPIO0_OR) | pins->mdio); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 49 | else |
| 50 | out_be32((void *)GPIO0_OR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 51 | in_be32((void *)GPIO0_OR) & ~pins->mdio); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 52 | |
| 53 | return 0; |
| 54 | } |
| 55 | |
| 56 | static int io_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) |
| 57 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 58 | struct io_bb_pinset *pins = bus->priv; |
| 59 | |
| 60 | *v = ((in_be32((void *)GPIO0_IR) & pins->mdio) != 0); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 61 | |
| 62 | return 0; |
| 63 | } |
| 64 | |
| 65 | static int io_bb_set_mdc(struct bb_miiphy_bus *bus, int v) |
| 66 | { |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 67 | struct io_bb_pinset *pins = bus->priv; |
| 68 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 69 | if (v) |
| 70 | out_be32((void *)GPIO0_OR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 71 | in_be32((void *)GPIO0_OR) | pins->mdc); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 72 | else |
| 73 | out_be32((void *)GPIO0_OR, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 74 | in_be32((void *)GPIO0_OR) & ~pins->mdc); |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 75 | |
| 76 | return 0; |
| 77 | } |
| 78 | |
| 79 | static int io_bb_delay(struct bb_miiphy_bus *bus) |
| 80 | { |
| 81 | udelay(1); |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 86 | struct io_bb_pinset io_bb_pinsets[] = { |
| 87 | { |
| 88 | .mdio = CONFIG_SYS_MDIO_PIN, |
| 89 | .mdc = CONFIG_SYS_MDC_PIN, |
| 90 | }, |
| 91 | #ifdef CONFIG_SYS_GBIT_MII1_BUSNAME |
| 92 | { |
| 93 | .mdio = CONFIG_SYS_MDIO1_PIN, |
| 94 | .mdc = CONFIG_SYS_MDC1_PIN, |
| 95 | }, |
| 96 | #endif |
| 97 | }; |
| 98 | |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 99 | struct bb_miiphy_bus bb_miiphy_buses[] = { |
| 100 | { |
| 101 | .name = CONFIG_SYS_GBIT_MII_BUSNAME, |
| 102 | .init = io_bb_mii_init, |
| 103 | .mdio_active = io_bb_mdio_active, |
| 104 | .mdio_tristate = io_bb_mdio_tristate, |
| 105 | .set_mdio = io_bb_set_mdio, |
| 106 | .get_mdio = io_bb_get_mdio, |
| 107 | .set_mdc = io_bb_set_mdc, |
| 108 | .delay = io_bb_delay, |
Dirk Eibach | 6fabe55 | 2011-10-20 11:12:55 +0200 | [diff] [blame] | 109 | .priv = &io_bb_pinsets[0], |
| 110 | }, |
| 111 | #ifdef CONFIG_SYS_GBIT_MII1_BUSNAME |
| 112 | { |
| 113 | .name = CONFIG_SYS_GBIT_MII1_BUSNAME, |
| 114 | .init = io_bb_mii_init, |
| 115 | .mdio_active = io_bb_mdio_active, |
| 116 | .mdio_tristate = io_bb_mdio_tristate, |
| 117 | .set_mdio = io_bb_set_mdio, |
| 118 | .get_mdio = io_bb_get_mdio, |
| 119 | .set_mdc = io_bb_set_mdc, |
| 120 | .delay = io_bb_delay, |
| 121 | .priv = &io_bb_pinsets[1], |
| 122 | }, |
| 123 | #endif |
Dirk Eibach | 9a13d81 | 2010-10-21 10:50:05 +0200 | [diff] [blame] | 124 | }; |
| 125 | |
| 126 | int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / |
| 127 | sizeof(bb_miiphy_buses[0]); |