Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 2 | /* |
Patrice Chotard | 9e21624 | 2017-10-23 09:53:57 +0200 | [diff] [blame] | 3 | * Copyright (C) 2017, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Patrice Chotard | aecc94c | 2017-09-05 11:04:27 +0200 | [diff] [blame] | 8 | #include <linux/usb/otg.h> |
| 9 | #include <dwc3-sti-glue.h> |
| 10 | #include <dwc3-uboot.h> |
| 11 | #include <usb.h> |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 12 | |
| 13 | DECLARE_GLOBAL_DATA_PTR; |
| 14 | |
| 15 | int dram_init(void) |
| 16 | { |
| 17 | gd->ram_size = PHYS_SDRAM_1_SIZE; |
| 18 | return 0; |
| 19 | } |
| 20 | |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 21 | int dram_init_banksize(void) |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 22 | { |
| 23 | gd->bd->bi_dram[0].start = PHYS_SDRAM_1; |
| 24 | gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; |
Simon Glass | 2f949c3 | 2017-03-31 08:40:32 -0600 | [diff] [blame] | 25 | |
| 26 | return 0; |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 27 | } |
| 28 | |
Trevor Woerner | 43ec7e0 | 2019-05-03 09:41:00 -0400 | [diff] [blame] | 29 | #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) |
Patrice Chotard | 411b3fc | 2017-03-20 15:21:36 +0100 | [diff] [blame] | 30 | void enable_caches(void) |
| 31 | { |
| 32 | /* Enable D-cache. I-cache is already enabled in start.S */ |
| 33 | dcache_enable(); |
| 34 | } |
| 35 | #endif |
| 36 | |
Patrice Chotard | 2f32979 | 2017-02-21 13:37:12 +0100 | [diff] [blame] | 37 | int board_init(void) |
| 38 | { |
| 39 | return 0; |
| 40 | } |
Patrice Chotard | aecc94c | 2017-09-05 11:04:27 +0200 | [diff] [blame] | 41 | |
| 42 | #ifdef CONFIG_USB_DWC3 |
| 43 | static struct dwc3_device dwc3_device_data = { |
| 44 | .maximum_speed = USB_SPEED_HIGH, |
| 45 | .dr_mode = USB_DR_MODE_PERIPHERAL, |
| 46 | .index = 0, |
| 47 | }; |
| 48 | |
| 49 | int usb_gadget_handle_interrupts(int index) |
| 50 | { |
| 51 | dwc3_uboot_handle_interrupt(index); |
| 52 | return 0; |
| 53 | } |
| 54 | |
| 55 | int board_usb_init(int index, enum usb_init_type init) |
| 56 | { |
| 57 | int node; |
| 58 | const void *blob = gd->fdt_blob; |
| 59 | |
| 60 | /* find the snps,dwc3 node */ |
| 61 | node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3"); |
| 62 | |
| 63 | dwc3_device_data.base = fdtdec_get_addr(blob, node, "reg"); |
| 64 | |
| 65 | return dwc3_uboot_init(&dwc3_device_data); |
| 66 | } |
| 67 | |
| 68 | int board_usb_cleanup(int index, enum usb_init_type init) |
| 69 | { |
| 70 | dwc3_uboot_exit(index); |
| 71 | return 0; |
| 72 | } |
| 73 | |
| 74 | int g_dnl_board_usb_cable_connected(void) |
| 75 | { |
| 76 | return 1; |
| 77 | } |
| 78 | #endif |