blob: 571be32088336a8097b66e03e46112a847311eb4 [file] [log] [blame]
Lukasz Majewski4de44bb2019-06-24 15:50:45 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 DENX Software Engineering
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
5 *
6 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
7 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Gated clock implementation
14 *
15 */
16
17#include <common.h>
18#include <asm/io.h>
19#include <malloc.h>
20#include <clk-uclass.h>
21#include <dm/device.h>
22#include <linux/clk-provider.h>
23#include <clk.h>
24#include "clk.h"
25
26#define UBOOT_DM_CLK_IMX_GATE2 "imx_clk_gate2"
27
28struct clk_gate2 {
29 struct clk clk;
30 void __iomem *reg;
31 u8 bit_idx;
32 u8 cgr_val;
33 u8 flags;
34};
35
36#define to_clk_gate2(_clk) container_of(_clk, struct clk_gate2, clk)
37
38static int clk_gate2_enable(struct clk *clk)
39{
40 struct clk_gate2 *gate = to_clk_gate2(dev_get_clk_ptr(clk->dev));
41 u32 reg;
42
43 reg = readl(gate->reg);
44 reg &= ~(3 << gate->bit_idx);
45 reg |= gate->cgr_val << gate->bit_idx;
46 writel(reg, gate->reg);
47
48 return 0;
49}
50
51static int clk_gate2_disable(struct clk *clk)
52{
53 struct clk_gate2 *gate = to_clk_gate2(dev_get_clk_ptr(clk->dev));
54 u32 reg;
55
56 reg = readl(gate->reg);
57 reg &= ~(3 << gate->bit_idx);
58 writel(reg, gate->reg);
59
60 return 0;
61}
62
63static const struct clk_ops clk_gate2_ops = {
64 .enable = clk_gate2_enable,
65 .disable = clk_gate2_disable,
66 .get_rate = clk_generic_get_rate,
67};
68
69struct clk *clk_register_gate2(struct device *dev, const char *name,
70 const char *parent_name, unsigned long flags,
71 void __iomem *reg, u8 bit_idx, u8 cgr_val,
72 u8 clk_gate2_flags)
73{
74 struct clk_gate2 *gate;
75 struct clk *clk;
76 int ret;
77
78 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
79 if (!gate)
80 return ERR_PTR(-ENOMEM);
81
82 gate->reg = reg;
83 gate->bit_idx = bit_idx;
84 gate->cgr_val = cgr_val;
85 gate->flags = clk_gate2_flags;
86
87 clk = &gate->clk;
88
89 ret = clk_register(clk, UBOOT_DM_CLK_IMX_GATE2, name, parent_name);
90 if (ret) {
91 kfree(gate);
92 return ERR_PTR(ret);
93 }
94
95 return clk;
96}
97
98U_BOOT_DRIVER(clk_gate2) = {
99 .name = UBOOT_DM_CLK_IMX_GATE2,
100 .id = UCLASS_CLK,
101 .ops = &clk_gate2_ops,
102 .flags = DM_FLAG_PRE_RELOC,
103};