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wdenk7eaacc52003-08-29 22:00:43 +00001/*
2 * (C) Copyright 2001
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
wdenk7c762882004-02-12 15:11:57 +00005 * (C) Copyright 2001-2004
wdenk7eaacc52003-08-29 22:00:43 +00006 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2003
9 * Texas Instruments, <www.ti.com>
10 * Kshitij Gupta <Kshitij@ti.com>
11 *
12 * See file CREDITS for list of people who contributed to this
13 * project.
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
wdenk6cfa84e2004-02-10 00:03:41 +000022 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
wdenk7eaacc52003-08-29 22:00:43 +000023 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 * MA 02111-1307 USA
29 */
30
31#include <common.h>
32#include <linux/byteorder/swab.h>
33
34#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020035flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
wdenk7eaacc52003-08-29 22:00:43 +000036
37/* Board support for 1 or 2 flash devices */
38#undef FLASH_PORT_WIDTH32
39#define FLASH_PORT_WIDTH16
40
41#ifdef FLASH_PORT_WIDTH16
42#define FLASH_PORT_WIDTH ushort
43#define FLASH_PORT_WIDTHV vu_short
44#define SWAP(x) __swab16(x)
45#else
46#define FLASH_PORT_WIDTH ulong
47#define FLASH_PORT_WIDTHV vu_long
48#define SWAP(x) __swab32(x)
49#endif
50
51#define FPW FLASH_PORT_WIDTH
52#define FPWV FLASH_PORT_WIDTHV
53
54#define mb() __asm__ __volatile__ ("" : : : "memory")
55
56
wdenk7eaacc52003-08-29 22:00:43 +000057/* Flash Organization Structure */
58typedef struct OrgDef {
59 unsigned int sector_number;
60 unsigned int sector_size;
61} OrgDef;
62
63
64/* Flash Organizations */
65OrgDef OrgIntel_28F256L18T[] = {
66 {4, 32 * 1024}, /* 4 * 32kBytes sectors */
67 {255, 128 * 1024}, /* 255 * 128kBytes sectors */
68};
69
70
71/*-----------------------------------------------------------------------
72 * Functions
73 */
74unsigned long flash_init (void);
75static ulong flash_get_size (FPW * addr, flash_info_t * info);
76static int write_data (flash_info_t * info, ulong dest, FPW data);
77static void flash_get_offsets (ulong base, flash_info_t * info);
78void inline spin_wheel (void);
79void flash_print_info (flash_info_t * info);
80void flash_unprotect_sectors (FPWV * addr);
81int flash_erase (flash_info_t * info, int s_first, int s_last);
82int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
wdenk7c762882004-02-12 15:11:57 +000083void flash_unlock(flash_info_t * info);
wdenk7eaacc52003-08-29 22:00:43 +000084
85/*-----------------------------------------------------------------------
86 */
87
88unsigned long flash_init (void)
89{
90 int i;
91 ulong size = 0;
wdenk920e91b2004-06-09 15:25:53 +000092
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020093 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
wdenk7eaacc52003-08-29 22:00:43 +000094 switch (i) {
95 case 0:
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020096 flash_get_size ((FPW *) CONFIG_SYS_FLASH_BASE, &flash_info[i]);
97 flash_get_offsets (CONFIG_SYS_FLASH_BASE, &flash_info[i]);
wdenkca262162004-02-09 20:51:26 +000098 /* to reset the lock bit */
99 flash_unlock(&flash_info[i]);
wdenk7eaacc52003-08-29 22:00:43 +0000100 break;
101 default:
wdenk5958f4a2003-09-18 09:21:33 +0000102 panic ("configured too many flash banks!\n");
wdenk7eaacc52003-08-29 22:00:43 +0000103 break;
104 }
105 size += flash_info[i].size;
106 }
107
108 /* Protect monitor and environment sectors
109 */
110 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200111 CONFIG_SYS_FLASH_BASE,
112 CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
wdenk7eaacc52003-08-29 22:00:43 +0000113
114 flash_protect (FLAG_PROTECT_SET,
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200115 CONFIG_ENV_ADDR,
116 CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0]);
wdenk7eaacc52003-08-29 22:00:43 +0000117
118 return size;
119}
120
121/*-----------------------------------------------------------------------
122 */
wdenk7c762882004-02-12 15:11:57 +0000123void flash_unlock(flash_info_t * info)
wdenkca262162004-02-09 20:51:26 +0000124{
wdenk6cfa84e2004-02-10 00:03:41 +0000125 int j;
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200126 for (j=2;j<CONFIG_SYS_MAX_FLASH_SECT;j++){
wdenk6cfa84e2004-02-10 00:03:41 +0000127 FPWV *addr = (FPWV *) (info->start[j]);
128 flash_unprotect_sectors (addr);
129 *addr = (FPW) 0x00500050;/* clear status register */
130 *addr = (FPW) 0x00FF00FF;/* resest to read mode */
131 }
wdenkca262162004-02-09 20:51:26 +0000132}
133
134/*-----------------------------------------------------------------------
135 */
wdenk7eaacc52003-08-29 22:00:43 +0000136static void flash_get_offsets (ulong base, flash_info_t * info)
137{
138 int i;
139 OrgDef *pOrgDef;
140
141 pOrgDef = OrgIntel_28F256L18T;
142 if (info->flash_id == FLASH_UNKNOWN) {
143 return;
144 }
145
146 if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
147 for (i = 0; i < info->sector_count; i++) {
148 if (i > 255) {
149 info->start[i] = base + (i * 0x8000);
150 info->protect[i] = 0;
151 } else {
152 info->start[i] = base +
153 (i * PHYS_FLASH_SECT_SIZE);
154 info->protect[i] = 0;
155 }
156 }
157 }
158}
159
160/*-----------------------------------------------------------------------
161 */
162void flash_print_info (flash_info_t * info)
163{
164 int i;
165
166 if (info->flash_id == FLASH_UNKNOWN) {
167 printf ("missing or unknown FLASH type\n");
168 return;
169 }
170
171 switch (info->flash_id & FLASH_VENDMASK) {
172 case FLASH_MAN_INTEL:
173 printf ("INTEL ");
174 break;
175 default:
176 printf ("Unknown Vendor ");
177 break;
178 }
179
180 switch (info->flash_id & FLASH_TYPEMASK) {
181 case FLASH_28F256L18T:
182 printf ("FLASH 28F256L18T\n");
183 break;
184 default:
185 printf ("Unknown Chip Type\n");
186 break;
187 }
188
189 printf (" Size: %ld MB in %d Sectors\n",
190 info->size >> 20, info->sector_count);
191
192 printf (" Sector Start Addresses:");
193 for (i = 0; i < info->sector_count; ++i) {
194 if ((i % 5) == 0)
195 printf ("\n ");
196 printf (" %08lX%s",
wdenk6cfa84e2004-02-10 00:03:41 +0000197 info->start[i], info->protect[i] ? " (RO)" : " ");
wdenk7eaacc52003-08-29 22:00:43 +0000198 }
199 printf ("\n");
200 return;
201}
202
203/*
204 * The following code cannot be run from FLASH!
205 */
206static ulong flash_get_size (FPW * addr, flash_info_t * info)
207{
208 volatile FPW value;
209
210 /* Write auto select command: read Manufacturer ID */
211 addr[0x5555] = (FPW) 0x00AA00AA;
212 addr[0x2AAA] = (FPW) 0x00550055;
213 addr[0x5555] = (FPW) 0x00900090;
214
215 mb ();
216 value = addr[0];
217
218 switch (value) {
219
220 case (FPW) INTEL_MANUFACT:
221 info->flash_id = FLASH_MAN_INTEL;
222 break;
223
224 default:
225 info->flash_id = FLASH_UNKNOWN;
226 info->sector_count = 0;
227 info->size = 0;
228 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
wdenk6cfa84e2004-02-10 00:03:41 +0000229 return (0); /* no or unknown flash */
wdenk7eaacc52003-08-29 22:00:43 +0000230 }
231
232 mb ();
wdenk6cfa84e2004-02-10 00:03:41 +0000233 value = addr[1]; /* device ID */
wdenk7eaacc52003-08-29 22:00:43 +0000234 switch (value) {
235
236 case (FPW) (INTEL_ID_28F256L18T):
237 info->flash_id += FLASH_28F256L18T;
238 info->sector_count = 259;
239 info->size = 0x02000000;
wdenk6cfa84e2004-02-10 00:03:41 +0000240 break; /* => 32 MB */
wdenk7eaacc52003-08-29 22:00:43 +0000241
242 default:
243 info->flash_id = FLASH_UNKNOWN;
244 break;
245 }
246
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200247 if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
wdenk7eaacc52003-08-29 22:00:43 +0000248 printf ("** ERROR: sector count %d > max (%d) **\n",
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200249 info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
250 info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
wdenk7eaacc52003-08-29 22:00:43 +0000251 }
252
253 addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
254
255 return (info->size);
256}
257
258
wdenk7eaacc52003-08-29 22:00:43 +0000259/* unprotects a sector for write and erase
260 * on some intel parts, this unprotects the entire chip, but it
261 * wont hurt to call this additional times per sector...
262 */
263void flash_unprotect_sectors (FPWV * addr)
264{
265#define PD_FINTEL_WSMS_READY_MASK 0x0080
266
267 *addr = (FPW) 0x00500050; /* clear status register */
268
269 /* this sends the clear lock bit command */
270 *addr = (FPW) 0x00600060;
271 *addr = (FPW) 0x00D000D0;
272}
273
274
275/*-----------------------------------------------------------------------
276 */
277
278int flash_erase (flash_info_t * info, int s_first, int s_last)
279{
280 int flag, prot, sect;
Graeme Russf8b82ee2011-07-15 23:31:37 +0000281 ulong type, start;
wdenk7eaacc52003-08-29 22:00:43 +0000282 int rcode = 0;
283
284 if ((s_first < 0) || (s_first > s_last)) {
285 if (info->flash_id == FLASH_UNKNOWN) {
286 printf ("- missing\n");
287 } else {
288 printf ("- no sectors to erase\n");
289 }
290 return 1;
291 }
292
293 type = (info->flash_id & FLASH_VENDMASK);
294 if ((type != FLASH_MAN_INTEL)) {
295 printf ("Can't erase unknown flash type %08lx - aborted\n",
296 info->flash_id);
297 return 1;
298 }
299
300 prot = 0;
301 for (sect = s_first; sect <= s_last; ++sect) {
302 if (info->protect[sect]) {
303 prot++;
304 }
305 }
306
307 if (prot) {
308 printf ("- Warning: %d protected sectors will not be erased!\n",
309 prot);
310 } else {
311 printf ("\n");
312 }
313
wdenk7eaacc52003-08-29 22:00:43 +0000314 /* Disable interrupts which might cause a timeout here */
315 flag = disable_interrupts ();
316
317 /* Start erase on unprotected sectors */
318 for (sect = s_first; sect <= s_last; sect++) {
wdenk6cfa84e2004-02-10 00:03:41 +0000319 if (info->protect[sect] == 0) { /* not protected */
wdenk7eaacc52003-08-29 22:00:43 +0000320 FPWV *addr = (FPWV *) (info->start[sect]);
321 FPW status;
322
323 printf ("Erasing sector %2d ... ", sect);
324
325 flash_unprotect_sectors (addr);
326
327 /* arm simple, non interrupt dependent timer */
Graeme Russf8b82ee2011-07-15 23:31:37 +0000328 start = get_timer(0);
wdenk7eaacc52003-08-29 22:00:43 +0000329
330 *addr = (FPW) 0x00500050;/* clear status register */
331 *addr = (FPW) 0x00200020;/* erase setup */
332 *addr = (FPW) 0x00D000D0;/* erase confirm */
333
334 while (((status =
335 *addr) & (FPW) 0x00800080) !=
336 (FPW) 0x00800080) {
Graeme Russf8b82ee2011-07-15 23:31:37 +0000337 if (get_timer(start) >
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200338 CONFIG_SYS_FLASH_ERASE_TOUT) {
wdenk7eaacc52003-08-29 22:00:43 +0000339 printf ("Timeout\n");
340 /* suspend erase */
341 *addr = (FPW) 0x00B000B0;
342 /* reset to read mode */
343 *addr = (FPW) 0x00FF00FF;
344 rcode = 1;
345 break;
346 }
347 }
348
wdenk6cfa84e2004-02-10 00:03:41 +0000349 /* clear status register cmd. */
wdenk7eaacc52003-08-29 22:00:43 +0000350 *addr = (FPW) 0x00500050;
351 *addr = (FPW) 0x00FF00FF;/* resest to read mode */
352 printf (" done\n");
353 }
354 }
355 return rcode;
356}
357
358/*-----------------------------------------------------------------------
359 * Copy memory to flash, returns:
360 * 0 - OK
361 * 1 - write timeout
362 * 2 - Flash not erased
363 * 4 - Flash not identified
364 */
365
366int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
367{
368 ulong cp, wp;
369 FPW data;
370 int count, i, l, rc, port_width;
371
372 if (info->flash_id == FLASH_UNKNOWN) {
373 return 4;
374 }
375/* get lower word aligned address */
376#ifdef FLASH_PORT_WIDTH16
377 wp = (addr & ~1);
378 port_width = 2;
379#else
380 wp = (addr & ~3);
381 port_width = 4;
382#endif
383
384 /*
385 * handle unaligned start bytes
386 */
387 if ((l = addr - wp) != 0) {
388 data = 0;
389 for (i = 0, cp = wp; i < l; ++i, ++cp) {
390 data = (data << 8) | (*(uchar *) cp);
391 }
392 for (; i < port_width && cnt > 0; ++i) {
393 data = (data << 8) | *src++;
394 --cnt;
395 ++cp;
396 }
397 for (; cnt == 0 && i < port_width; ++i, ++cp) {
398 data = (data << 8) | (*(uchar *) cp);
399 }
400
401 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
402 return (rc);
403 }
404 wp += port_width;
405 }
406
407 /*
408 * handle word aligned part
409 */
410 count = 0;
411 while (cnt >= port_width) {
412 data = 0;
413 for (i = 0; i < port_width; ++i) {
414 data = (data << 8) | *src++;
415 }
416 if ((rc = write_data (info, wp, SWAP (data))) != 0) {
417 return (rc);
418 }
419 wp += port_width;
420 cnt -= port_width;
421 if (count++ > 0x800) {
422 spin_wheel ();
423 count = 0;
424 }
425 }
426
427 if (cnt == 0) {
428 return (0);
429 }
430
431 /*
432 * handle unaligned tail bytes
433 */
434 data = 0;
435 for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
436 data = (data << 8) | *src++;
437 --cnt;
438 }
439 for (; i < port_width; ++i, ++cp) {
440 data = (data << 8) | (*(uchar *) cp);
441 }
442
443 return (write_data (info, wp, SWAP (data)));
444}
445
446/*-----------------------------------------------------------------------
447 * Write a word or halfword to Flash, returns:
448 * 0 - OK
449 * 1 - write timeout
450 * 2 - Flash not erased
451 */
452static int write_data (flash_info_t * info, ulong dest, FPW data)
453{
454 FPWV *addr = (FPWV *) dest;
455 ulong status;
456 int flag;
Graeme Russf8b82ee2011-07-15 23:31:37 +0000457 ulong start;
wdenk7eaacc52003-08-29 22:00:43 +0000458
459 /* Check if Flash is (sufficiently) erased */
460 if ((*addr & data) != data) {
461 printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
462 return (2);
463 }
wdenk7eaacc52003-08-29 22:00:43 +0000464 /* Disable interrupts which might cause a timeout here */
465 flag = disable_interrupts ();
466 *addr = (FPW) 0x00400040; /* write setup */
467 *addr = data;
468
469 /* arm simple, non interrupt dependent timer */
Graeme Russf8b82ee2011-07-15 23:31:37 +0000470 start = get_timer(0);
wdenk7eaacc52003-08-29 22:00:43 +0000471
472 /* wait while polling the status register */
473 while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
Graeme Russf8b82ee2011-07-15 23:31:37 +0000474 if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
wdenk7eaacc52003-08-29 22:00:43 +0000475 *addr = (FPW) 0x00FF00FF; /* restore read mode */
476 return (1);
477 }
478 }
479 *addr = (FPW) 0x00FF00FF; /* restore read mode */
480 return (0);
481}
482
483void inline spin_wheel (void)
484{
485 static int p = 0;
486 static char w[] = "\\/-";
487
488 printf ("\010%c", w[p]);
489 (++p == 3) ? (p = 0) : 0;
490}