| Shengzhou Liu | 9eca55f | 2014-11-24 17:11:55 +0800 | [diff] [blame] | 1 | # single-source clock:Sys_Clock = DDR_Refclock = Diff_Sysclk = 100 MHz |
| 2 | # Core/DDR/Platform/FMan = 1400MHz/1600MT/s/400MHz/700MHz |
| 3 | |
| 4 | # PBL preamble and RCW header for T1024QDS |
| 5 | aa55aa55 010e0100 |
| 6 | # Serdes protocol 0x6F |
| 7 | 0810000e 00000000 00000000 00000000 |
| Zhao Qiang | 55107dc | 2016-09-08 12:55:32 +0800 | [diff] [blame] | 8 | 37800001 00000012 68104000 21000000 |
| Shengzhou Liu | 9eca55f | 2014-11-24 17:11:55 +0800 | [diff] [blame] | 9 | 00000000 00000000 00000000 00030810 |
| 10 | 00000000 036c5a00 00000000 00000006 |