blob: 464227b3b25de125462199ce5a7dc6511f16fe24 [file] [log] [blame]
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * AM62A7 SK dts file for R5 SPL
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
5 */
6
7#include "k3-am62a7-sk.dts"
8#include "k3-am62a-ddr-1866mhz-32bit.dtsi"
9#include "k3-am62a-ddr.dtsi"
10
11#include "k3-am62a7-sk-u-boot.dtsi"
12
13/ {
14 aliases {
15 remoteproc0 = &sysctrler;
16 remoteproc1 = &a53_0;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050017 };
18
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050019 a53_0: a53@0 {
20 compatible = "ti,am654-rproc";
21 reg = <0x00 0x00a90000 0x00 0x10>;
22 power-domains = <&k3_pds 61 TI_SCI_PD_EXCLUSIVE>,
Manorit Chawdhry5c760a62023-04-14 09:47:58 +053023 <&k3_pds 135 TI_SCI_PD_EXCLUSIVE>,
24 <&k3_pds 166 TI_SCI_PD_EXCLUSIVE>;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050025 resets = <&k3_reset 135 0>;
Manorit Chawdhryf23728b2024-10-15 16:22:19 +053026 clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
27 clock-names = "gtc", "core";
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050028 assigned-clocks = <&k3_clks 61 0>, <&k3_clks 135 0>;
29 assigned-clock-parents = <&k3_clks 61 2>;
30 assigned-clock-rates = <200000000>, <1200000000>;
31 ti,sci = <&dmsc>;
32 ti,sci-proc-id = <32>;
33 ti,sci-host-id = <10>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070034 bootph-pre-ram;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050035 };
36
37 dm_tifs: dm-tifs {
38 compatible = "ti,j721e-dm-sci";
39 ti,host-id = <36>;
40 ti,secure-host;
41 mbox-names = "rx", "tx";
42 mboxes= <&secure_proxy_main 22>,
43 <&secure_proxy_main 23>;
Simon Glassd3a98cb2023-02-13 08:56:33 -070044 bootph-pre-ram;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050045 };
46};
47
48&dmsc {
49 mboxes= <&secure_proxy_main 0>,
50 <&secure_proxy_main 1>,
51 <&secure_proxy_main 0>;
52 mbox-names = "rx", "tx", "notify";
53 ti,host-id = <35>;
54 ti,secure-host;
55};
56
Nishanth Menonca012b92023-11-13 08:51:43 -060057&secure_proxy_sa3 {
58 /* Needed for initial handshake with ROM */
59 status = "okay";
60 bootph-pre-ram;
61};
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050062
Nishanth Menonca012b92023-11-13 08:51:43 -060063&cbass_main {
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050064 sysctrler: sysctrler {
65 compatible = "ti,am654-system-controller";
66 mboxes= <&secure_proxy_main 1>,
67 <&secure_proxy_main 0>,
Nishanth Menonca012b92023-11-13 08:51:43 -060068 <&secure_proxy_sa3 0>;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050069 mbox-names = "tx", "rx", "boot_notify";
Simon Glassd3a98cb2023-02-13 08:56:33 -070070 bootph-pre-ram;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050071 };
72};
73
Nishanth Menonca012b92023-11-13 08:51:43 -060074&wkup_uart0_pins_default {
Simon Glassd3a98cb2023-02-13 08:56:33 -070075 bootph-pre-ram;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050076};
77
Nishanth Menonca012b92023-11-13 08:51:43 -060078&main_uart1_pins_default {
Simon Glassd3a98cb2023-02-13 08:56:33 -070079 bootph-pre-ram;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050080};
81
82/* WKUP UART0 is used for DM firmware logs */
83&wkup_uart0 {
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050084 status = "okay";
Simon Glassd3a98cb2023-02-13 08:56:33 -070085 bootph-pre-ram;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050086};
87
88/* Main UART1 is used for TIFS firmware logs */
89&main_uart1 {
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050090 status = "okay";
Simon Glassd3a98cb2023-02-13 08:56:33 -070091 bootph-pre-ram;
Bryan Brattlofe1dd18c2022-11-03 19:13:52 -050092};