maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2016 Google, Inc |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0 |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
| 9 | #include <errno.h> |
| 10 | #include <sysreset.h> |
maxims@google.com | 0fdb11a | 2017-04-17 12:00:26 -0700 | [diff] [blame] | 11 | #include <wdt.h> |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 12 | #include <asm/io.h> |
| 13 | #include <asm/arch/wdt.h> |
| 14 | #include <linux/err.h> |
| 15 | |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 16 | static int ast_sysreset_request(struct udevice *dev, enum sysreset_t type) |
| 17 | { |
maxims@google.com | 0fdb11a | 2017-04-17 12:00:26 -0700 | [diff] [blame] | 18 | struct udevice *wdt; |
| 19 | u32 reset_mode; |
| 20 | int ret = uclass_first_device(UCLASS_WDT, &wdt); |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 21 | |
maxims@google.com | 0fdb11a | 2017-04-17 12:00:26 -0700 | [diff] [blame] | 22 | if (ret) |
| 23 | return ret; |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 24 | |
| 25 | switch (type) { |
| 26 | case SYSRESET_WARM: |
| 27 | reset_mode = WDT_CTRL_RESET_CPU; |
| 28 | break; |
| 29 | case SYSRESET_COLD: |
| 30 | reset_mode = WDT_CTRL_RESET_CHIP; |
| 31 | break; |
| 32 | default: |
| 33 | return -EPROTONOSUPPORT; |
| 34 | } |
| 35 | |
maxims@google.com | 0fdb11a | 2017-04-17 12:00:26 -0700 | [diff] [blame] | 36 | ret = wdt_expire_now(wdt, reset_mode); |
| 37 | if (ret) { |
| 38 | debug("Sysreset failed: %d", ret); |
| 39 | return ret; |
| 40 | } |
maxims@google.com | f57bd00 | 2017-01-18 13:44:55 -0800 | [diff] [blame] | 41 | |
| 42 | return -EINPROGRESS; |
| 43 | } |
| 44 | |
| 45 | static struct sysreset_ops ast_sysreset = { |
| 46 | .request = ast_sysreset_request, |
| 47 | }; |
| 48 | |
| 49 | U_BOOT_DRIVER(sysreset_ast) = { |
| 50 | .name = "ast_sysreset", |
| 51 | .id = UCLASS_SYSRESET, |
| 52 | .ops = &ast_sysreset, |
| 53 | }; |