blob: a2b540c90b6f0b84a40de3dc0497d1cd323bb092 [file] [log] [blame]
Svyatoslav Ryhel41c09182024-08-01 16:50:41 +03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2024
4 * Svyatoslav Ryhel <clamor95@gmail.com>
5 */
6
7#include <env.h>
8#include <spl_gpio.h>
9
10#include <asm/gpio.h>
11#include <asm/arch/pinmux.h>
12
13/*
14 * PCB_ID[1] is kb_row5_pr5
15 * PCB_ID[3] is kb_col7_pq7
16 * PCB_ID[4] is kb_row2_pr2
17 * PCB_ID[5] is kb_col5_pq5
18 *
19 * Project ID
20 * =====================================================
21 * PCB_ID[1] PCB_ID[5] PCB_ID[4] PCB_ID[3] Project
22 * 0 0 0 0 TF201
23 * 0 0 0 1 P1801
24 * 0 0 1 0 TF300T
25 * 0 0 1 1 TF300TG
26 * 0 1 0 0 TF700T
27 * 0 1 0 1 TF300TL
28 * 0 1 1 0 Extension
29 * 0 1 1 1 TF500T
30 * 1 0 0 0 TF502T/TF600T
31 * =====================================================
32 */
33enum project_rev {
34 TF201, P1801, TF300T, TF300TG, TF700T,
35 TF300TL, EXT, TF500T, TF600T
36};
37
38static const char * const project_id_to_fdt[] = {
39 [TF201] = "tegra30-asus-tf201",
40 [P1801] = "tegra30-asus-p1801-t",
41 [TF300T] = "tegra30-asus-tf300t",
42 [TF300TG] = "tegra30-asus-tf300tg",
43 [TF700T] = "tegra30-asus-tf700t",
44 [TF300TL] = "tegra30-asus-tf300tl",
45 [TF600T] = "tegra30-asus-tf600t",
46};
47
48static int id_gpio_get_value(u32 pingrp, u32 pin)
49{
50 /* Configure pinmux */
51 pinmux_set_func(pingrp, PMUX_FUNC_KBC);
52 pinmux_set_pullupdown(pingrp, PMUX_PULL_DOWN);
53 pinmux_tristate_enable(pingrp);
54 pinmux_set_io(pingrp, PMUX_PIN_INPUT);
55
56 /*
57 * Since this function may be called
58 * during DM reload we should use SPL
59 * GPIO functions which do not depend
60 * on DM.
61 */
62 spl_gpio_input(NULL, pin);
63 return spl_gpio_get_value(NULL, pin);
64}
65
66static int get_project_id(void)
67{
68 u32 pcb_id1, pcb_id3, pcb_id4, pcb_id5;
69
70 pcb_id1 = id_gpio_get_value(PMUX_PINGRP_KB_ROW5_PR5,
71 TEGRA_GPIO(R, 5));
72 pcb_id3 = id_gpio_get_value(PMUX_PINGRP_KB_COL7_PQ7,
73 TEGRA_GPIO(Q, 7));
74 pcb_id4 = id_gpio_get_value(PMUX_PINGRP_KB_ROW2_PR2,
75 TEGRA_GPIO(R, 2));
76 pcb_id5 = id_gpio_get_value(PMUX_PINGRP_KB_COL5_PQ5,
77 TEGRA_GPIO(Q, 5));
78
79 /* Construct board ID */
80 int proj_id = pcb_id1 << 3 | pcb_id5 << 2 |
81 pcb_id4 << 1 | pcb_id3;
82
83 log_debug("[TRANSFORMER]: project id %d (%s)\n", proj_id,
84 project_id_to_fdt[proj_id]);
85
86 /* Mark tablet with SPI flash */
87 if (proj_id == TF600T)
88 env_set_hex("spiflash", true);
89 else
90 env_set_hex("spiflash", false);
91
92 return proj_id & 0xf;
93}
94
95int board_fit_config_name_match(const char *name)
96{
97 if (!strcmp(name, project_id_to_fdt[get_project_id()]))
98 return 0;
99
100 return -1;
101}
102
103void nvidia_board_late_init(void)
104{
105 char dt_path[64] = { 0 };
106
107 snprintf(dt_path, sizeof(dt_path), "%s.dtb",
108 project_id_to_fdt[get_project_id()]);
109 env_set("fdtfile", dt_path);
110}