Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 1 | menu "mpc8xx CPU" |
Christophe Leroy | b3510fb | 2018-03-16 17:20:41 +0100 | [diff] [blame] | 2 | depends on MPC8xx |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 3 | |
| 4 | config SYS_CPU |
| 5 | default "mpc8xx" |
| 6 | |
| 7 | choice |
| 8 | prompt "Target select" |
| 9 | optional |
| 10 | |
Christophe Leroy | 3598295 | 2017-07-07 10:16:42 +0200 | [diff] [blame] | 11 | config TARGET_MCR3000 |
| 12 | bool "Support MCR3000 board from CSSI" |
| 13 | |
Christophe Leroy | 1fc46f5 | 2022-10-14 12:54:50 +0200 | [diff] [blame] | 14 | config TARGET_CMPC885 |
| 15 | bool "Support CMPC885 board from CSSI" |
| 16 | |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 17 | endchoice |
| 18 | |
Christophe Leroy | 23da373 | 2017-07-06 10:33:21 +0200 | [diff] [blame] | 19 | choice |
| 20 | prompt "CPU select" |
| 21 | default MPC866 |
| 22 | |
| 23 | config MPC866 |
| 24 | bool "MPC866" |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 25 | select SYS_CACHE_SHIFT_4 |
Christophe Leroy | 23da373 | 2017-07-06 10:33:21 +0200 | [diff] [blame] | 26 | |
| 27 | config MPC885 |
| 28 | bool "MPC885" |
Tom Rini | 3ef67ae | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 29 | select SYS_CACHE_SHIFT_4 |
Christophe Leroy | 23da373 | 2017-07-06 10:33:21 +0200 | [diff] [blame] | 30 | |
| 31 | endchoice |
| 32 | |
| 33 | config 8xx_GCLK_FREQ |
| 34 | int "CPU GCLK Frequency" |
| 35 | |
Christophe Leroy | ba4dafb | 2017-07-06 10:33:09 +0200 | [diff] [blame] | 36 | comment "Specific commands" |
| 37 | |
| 38 | config CMD_IMMAP |
| 39 | bool "Enable various commands to dump IMMR information" |
| 40 | help |
| 41 | This enables various commands such as: |
| 42 | |
| 43 | siuinfo - print System Interface Unit (SIU) registers |
| 44 | memcinfo - print Memory Controller registers |
Christophe Leroy | 23da373 | 2017-07-06 10:33:21 +0200 | [diff] [blame] | 45 | |
| 46 | comment "Configuration Registers" |
| 47 | |
| 48 | config SYS_SIUMCR |
| 49 | hex "SIUMCR register" |
| 50 | help |
| 51 | SIU Module Configuration (11-6) |
| 52 | |
| 53 | config SYS_SYPCR |
| 54 | hex "SYPCR register" |
| 55 | help |
| 56 | System Protection Control (11-9) |
| 57 | |
| 58 | config SYS_TBSCR |
| 59 | hex "TBSCR register" |
| 60 | help |
| 61 | Time Base Status and Control (11-26) |
| 62 | |
| 63 | config SYS_PISCR |
| 64 | hex "PISCR register" |
| 65 | help |
| 66 | Periodic Interrupt Status and Control (11-31) |
| 67 | |
| 68 | config SYS_PLPRCR_BOOL |
| 69 | bool "Customise PLPRCR" |
| 70 | |
| 71 | config SYS_PLPRCR |
| 72 | hex "PLPRCR register" |
| 73 | depends on SYS_PLPRCR_BOOL |
| 74 | help |
| 75 | PLL, Low-Power, and Reset Control Register (15-30) |
| 76 | |
| 77 | config SYS_SCCR |
| 78 | hex "SCCR register" |
| 79 | help |
| 80 | System Clock and reset Control Register (15-27) |
| 81 | |
| 82 | config SYS_SCCR_MASK |
| 83 | hex "MASK for setting SCCR register" |
| 84 | |
| 85 | config SYS_DER |
| 86 | hex "DER register" |
| 87 | help |
| 88 | Debug Event Register (37-47) |
| 89 | |
Christophe Leroy | 5fb0b63 | 2023-01-30 09:11:03 +0100 | [diff] [blame] | 90 | source "board/cssi/mcr3000/Kconfig" |
Christophe Leroy | 3598295 | 2017-07-07 10:16:42 +0200 | [diff] [blame] | 91 | |
Christophe Leroy | 1fc46f5 | 2022-10-14 12:54:50 +0200 | [diff] [blame] | 92 | source "board/cssi/cmpc885/Kconfig" |
Christophe Leroy | 069fa83 | 2017-07-06 10:23:22 +0200 | [diff] [blame] | 93 | endmenu |