Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007-2008 |
Stelian Pop | 5ee0c7f | 2011-11-01 00:00:39 +0100 | [diff] [blame] | 3 | * Stelian Pop <stelian@popies.net> |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 4 | * Lead Tech Design <www.leadtechdesign.com> |
| 5 | * |
Daniel Gorsulowski | 2acb23b | 2015-11-02 07:59:49 +0100 | [diff] [blame] | 6 | * (C) Copyright 2009-2015 |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 7 | * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> |
| 8 | * esd electronic system design gmbh <www.esd.eu> |
| 9 | * |
| 10 | * Configuation settings for the esd MEESC board. |
| 11 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 12 | * SPDX-License-Identifier: GPL-2.0+ |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #ifndef __CONFIG_H |
| 16 | #define __CONFIG_H |
| 17 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 18 | /* |
| 19 | * SoC must be defined first, before hardware.h is included. |
| 20 | * In this case SoC is defined in boards.cfg. |
| 21 | */ |
| 22 | #include <asm/hardware.h> |
| 23 | |
| 24 | /* |
| 25 | * Warning: changing CONFIG_SYS_TEXT_BASE requires |
| 26 | * adapting the initial boot program. |
| 27 | * Since the linker has to swallow that define, we must use a pure |
| 28 | * hex number here! |
| 29 | */ |
Daniel Gorsulowski | 2acb23b | 2015-11-02 07:59:49 +0100 | [diff] [blame] | 30 | #define CONFIG_SYS_TEXT_BASE 0x21F00000 |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 31 | |
Daniel Gorsulowski | c623598 | 2011-10-30 22:52:28 +0000 | [diff] [blame] | 32 | /* |
| 33 | * since a number of boards are not being listed in linux |
| 34 | * arch/arm/tools/mach-types any more, the mach-types have to be |
| 35 | * defined here |
| 36 | */ |
| 37 | #define MACH_TYPE_MEESC 2165 |
| 38 | #define MACH_TYPE_ETHERCAN2 2407 |
| 39 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 40 | /* ARM asynchronous clock */ |
| 41 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* 32.768 kHz crystal */ |
Daniel Gorsulowski | 847726c | 2010-08-09 11:17:13 +0200 | [diff] [blame] | 42 | #define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */ |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 43 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 44 | /* Misc CPU related */ |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 45 | #define CONFIG_SKIP_LOWLEVEL_INIT |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 46 | #define CONFIG_ARCH_CPU_INIT |
| 47 | #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */ |
| 48 | #define CONFIG_SETUP_MEMORY_TAGS |
| 49 | #define CONFIG_INITRD_TAG |
| 50 | #define CONFIG_SERIAL_TAG |
| 51 | #define CONFIG_REVISION_TAG |
| 52 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
Daniel Gorsulowski | 88e5717 | 2010-01-20 08:00:11 +0100 | [diff] [blame] | 53 | #define CONFIG_MISC_INIT_R /* Call misc_init_r */ |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 54 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 55 | #define CONFIG_DISPLAY_BOARDINFO /* call checkboard() */ |
| 56 | #define CONFIG_DISPLAY_CPUINFO /* display cpu info and speed */ |
| 57 | #define CONFIG_PREBOOT /* enable preboot variable */ |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 58 | |
| 59 | /* |
| 60 | * Hardware drivers |
| 61 | */ |
| 62 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 63 | /* general purpose I/O */ |
| 64 | #define CONFIG_AT91_GPIO |
| 65 | |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 66 | /* Console output */ |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 67 | #define CONFIG_ATMEL_USART |
| 68 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| 69 | #define CONFIG_USART_ID ATMEL_ID_SYS |
| 70 | #define CONFIG_BAUDRATE 115200 |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 71 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 72 | #define CONFIG_BOOTDELAY 3 |
| 73 | #define CONFIG_ZERO_BOOTDELAY_CHECK |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 74 | |
| 75 | /* |
| 76 | * BOOTP options |
| 77 | */ |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 78 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 79 | #define CONFIG_BOOTP_BOOTPATH |
| 80 | #define CONFIG_BOOTP_GATEWAY |
| 81 | #define CONFIG_BOOTP_HOSTNAME |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 82 | |
| 83 | /* |
| 84 | * Command line configuration. |
| 85 | */ |
Daniel Gorsulowski | 2acb23b | 2015-11-02 07:59:49 +0100 | [diff] [blame] | 86 | |
Daniel Gorsulowski | 2acb23b | 2015-11-02 07:59:49 +0100 | [diff] [blame] | 87 | #ifdef CONFIG_SYS_USE_NANDFLASH |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 88 | #define CONFIG_CMD_NAND |
Daniel Gorsulowski | 2acb23b | 2015-11-02 07:59:49 +0100 | [diff] [blame] | 89 | #endif |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 90 | |
| 91 | /* LED */ |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 92 | #define CONFIG_AT91_LED |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 93 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 94 | /* |
| 95 | * SDRAM: 1 bank, min 32, max 128 MB |
| 96 | * Initialized before u-boot gets started. |
| 97 | */ |
Daniel Gorsulowski | 2acb23b | 2015-11-02 07:59:49 +0100 | [diff] [blame] | 98 | #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */ |
| 99 | #define PHYS_SDRAM_SIZE 0x02000000 /* 32 MByte */ |
| 100 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 101 | #define CONFIG_NR_DRAM_BANKS 1 |
Daniel Gorsulowski | 2acb23b | 2015-11-02 07:59:49 +0100 | [diff] [blame] | 102 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 103 | #define CONFIG_SYS_SDRAM_SIZE PHYS_SDRAM_SIZE |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 104 | |
| 105 | #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) |
| 106 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01E00000) |
| 107 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x00100000) |
| 108 | |
| 109 | /* |
| 110 | * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, |
| 111 | * leaving the correct space for initial global data structure above |
| 112 | * that address while providing maximum stack area below. |
| 113 | */ |
| 114 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 115 | (ATMEL_BASE_SRAM0 + 0x1000 - GENERATED_GBL_DATA_SIZE) |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 116 | |
| 117 | /* DataFlash */ |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 118 | #ifdef CONFIG_SYS_USE_DATAFLASH |
| 119 | # define CONFIG_ATMEL_DATAFLASH_SPI |
| 120 | # define CONFIG_HAS_DATAFLASH |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 121 | # define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 |
| 122 | # define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ |
| 123 | # define AT91_SPI_CLK 15000000 |
| 124 | # define DATAFLASH_TCSS (0x1a << 16) |
| 125 | # define DATAFLASH_TCHS (0x1 << 24) |
| 126 | #endif |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 127 | |
| 128 | /* NOR flash is not populated, disable it */ |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 129 | #define CONFIG_SYS_NO_FLASH |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 130 | |
| 131 | /* NAND flash */ |
| 132 | #ifdef CONFIG_CMD_NAND |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 133 | # define CONFIG_NAND_ATMEL |
| 134 | # define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Daniel Gorsulowski | 2acb23b | 2015-11-02 07:59:49 +0100 | [diff] [blame] | 135 | # define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 /* 0x40000000 */ |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 136 | # define CONFIG_SYS_NAND_DBW_8 |
| 137 | # define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 138 | # define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
Andreas Bießmann | a4c24d3 | 2013-11-29 12:13:45 +0100 | [diff] [blame] | 139 | # define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) |
| 140 | # define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 141 | #endif |
| 142 | |
| 143 | /* Ethernet */ |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 144 | #define CONFIG_MACB |
| 145 | #define CONFIG_RMII |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 146 | #define CONFIG_NET_RETRY_COUNT 20 |
| 147 | #undef CONFIG_RESET_PHY_R |
| 148 | |
Daniel Gorsulowski | 54b531a | 2009-09-29 08:03:12 +0200 | [diff] [blame] | 149 | /* hw-controller addresses */ |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 150 | #define CONFIG_ET1100_BASE 0x70000000 |
| 151 | |
| 152 | #ifdef CONFIG_SYS_USE_DATAFLASH |
Daniel Gorsulowski | 54b531a | 2009-09-29 08:03:12 +0200 | [diff] [blame] | 153 | |
| 154 | /* bootstrap + u-boot + env in dataflash on CS0 */ |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 155 | # define CONFIG_ENV_IS_IN_DATAFLASH |
| 156 | # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 157 | 0x8400) |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 158 | # define CONFIG_ENV_OFFSET 0x4200 |
| 159 | # define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 160 | CONFIG_ENV_OFFSET) |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 161 | # define CONFIG_ENV_SIZE 0x4200 |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 162 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 163 | #elif CONFIG_SYS_USE_NANDFLASH |
| 164 | |
| 165 | /* bootstrap + u-boot + env + linux in nandflash */ |
| 166 | # define CONFIG_ENV_IS_IN_NAND 1 |
| 167 | # define CONFIG_ENV_OFFSET 0xC0000 |
| 168 | # define CONFIG_ENV_SIZE 0x20000 |
| 169 | |
| 170 | #endif |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 171 | |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 172 | #define CONFIG_SYS_CBSIZE 512 |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 173 | #define CONFIG_SYS_MAXARGS 16 |
| 174 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 175 | sizeof(CONFIG_SYS_PROMPT) + 16) |
Matthias Fuchs | 2d56c2b | 2011-07-19 01:56:06 +0000 | [diff] [blame] | 176 | #define CONFIG_SYS_LONGHELP |
| 177 | #define CONFIG_CMDLINE_EDITING |
Daniel Gorsulowski | 2acb23b | 2015-11-02 07:59:49 +0100 | [diff] [blame] | 178 | #define CONFIG_AUTO_COMPLETE |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 179 | |
| 180 | /* |
| 181 | * Size of malloc() pool |
| 182 | */ |
Daniel Gorsulowski | 54b531a | 2009-09-29 08:03:12 +0200 | [diff] [blame] | 183 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ |
| 184 | 128*1024, 0x1000) |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 185 | |
Daniel Gorsulowski | 6f196d5 | 2009-06-30 21:03:37 +0200 | [diff] [blame] | 186 | #endif |