wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 1 | |
| 2 | /* |
| 3 | * Copyright 1998-2001 by Donald Becker. |
| 4 | * This software may be used and distributed according to the terms of |
| 5 | * the GNU General Public License (GPL), incorporated herein by reference. |
| 6 | * Contact the author for use under other terms. |
| 7 | * |
| 8 | * This program must be compiled with "-O"! |
| 9 | * See the bottom of this file for the suggested compile-command. |
| 10 | * |
| 11 | * The author may be reached as becker@scyld.com, or C/O |
| 12 | * Scyld Computing Corporation |
| 13 | * 410 Severn Ave., Suite 210 |
| 14 | * Annapolis MD 21403 |
| 15 | * |
| 16 | * Common-sense licensing statement: Using any portion of this program in |
| 17 | * your own program means that you must give credit to the original author |
| 18 | * and release the resulting code under the GPL. |
| 19 | */ |
| 20 | |
| 21 | #define _PPC_STRING_H_ /* avoid unnecessary str/mem functions */ |
| 22 | #define _LINUX_STRING_H_ /* avoid unnecessary str/mem functions */ |
| 23 | |
| 24 | #include <common.h> |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 25 | #include <exports.h> |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 26 | #include <asm/io.h> |
| 27 | |
| 28 | |
| 29 | /* Default EEPROM for i82559 */ |
| 30 | static unsigned short default_eeprom[64] = { |
| 31 | 0x0100, 0x0302, 0x0504, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 32 | 0xffff, 0xffff, 0x40c0, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, |
| 33 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 34 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 35 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 36 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 37 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, |
| 38 | 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff |
| 39 | }; |
| 40 | |
| 41 | static unsigned short eeprom[256]; |
| 42 | |
| 43 | static int eeprom_size = 64; |
| 44 | static int eeprom_addr_size = 6; |
| 45 | |
| 46 | static int debug = 0; |
| 47 | |
| 48 | static inline unsigned short swap16(unsigned short x) |
| 49 | { |
| 50 | return (((x & 0xff) << 8) | ((x & 0xff00) >> 8)); |
| 51 | } |
| 52 | |
| 53 | |
Graeme Russ | 2fe2a97 | 2008-09-07 07:08:42 +1000 | [diff] [blame] | 54 | void * memcpy(void * dest,const void *src,size_t count) |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 55 | { |
Graeme Russ | 2fe2a97 | 2008-09-07 07:08:42 +1000 | [diff] [blame] | 56 | char *tmp = (char *) dest, *s = (char *) src; |
| 57 | |
| 58 | while (count--) |
| 59 | *tmp++ = *s++; |
| 60 | |
| 61 | return dest; |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 62 | } |
| 63 | |
Graeme Russ | 2fe2a97 | 2008-09-07 07:08:42 +1000 | [diff] [blame] | 64 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 65 | /* The EEPROM commands include the alway-set leading bit. */ |
| 66 | #define EE_WRITE_CMD (5) |
| 67 | #define EE_READ_CMD (6) |
| 68 | #define EE_ERASE_CMD (7) |
| 69 | |
| 70 | /* Serial EEPROM section. */ |
| 71 | #define EE_SHIFT_CLK 0x01 /* EEPROM shift clock. */ |
| 72 | #define EE_CS 0x02 /* EEPROM chip select. */ |
| 73 | #define EE_DATA_WRITE 0x04 /* EEPROM chip data in. */ |
| 74 | #define EE_DATA_READ 0x08 /* EEPROM chip data out. */ |
| 75 | #define EE_ENB (0x4800 | EE_CS) |
| 76 | #define EE_WRITE_0 0x4802 |
| 77 | #define EE_WRITE_1 0x4806 |
| 78 | #define EE_OFFSET 14 |
| 79 | |
| 80 | /* Delay between EEPROM clock transitions. */ |
| 81 | #define eeprom_delay(ee_addr) inw(ee_addr) |
| 82 | |
| 83 | /* Wait for the EEPROM to finish the previous operation. */ |
| 84 | static int eeprom_busy_poll(long ee_ioaddr) |
| 85 | { |
| 86 | int i; |
| 87 | outw(EE_ENB, ee_ioaddr); |
| 88 | for (i = 0; i < 10000; i++) /* Typical 2000 ticks */ |
| 89 | if (inw(ee_ioaddr) & EE_DATA_READ) |
| 90 | break; |
| 91 | return i; |
| 92 | } |
| 93 | |
| 94 | /* This executes a generic EEPROM command, typically a write or write enable. |
| 95 | It returns the data output from the EEPROM, and thus may also be used for |
| 96 | reads. */ |
| 97 | static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len) |
| 98 | { |
| 99 | unsigned retval = 0; |
| 100 | long ee_addr = ioaddr + EE_OFFSET; |
| 101 | |
| 102 | if (debug > 1) |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 103 | printf(" EEPROM op 0x%x: ", cmd); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 104 | |
| 105 | outw(EE_ENB | EE_SHIFT_CLK, ee_addr); |
| 106 | |
| 107 | /* Shift the command bits out. */ |
| 108 | do { |
| 109 | short dataval = (cmd & (1 << cmd_len)) ? EE_WRITE_1 : EE_WRITE_0; |
| 110 | outw(dataval, ee_addr); |
| 111 | eeprom_delay(ee_addr); |
| 112 | if (debug > 2) |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 113 | printf("%X", inw(ee_addr) & 15); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 114 | outw(dataval | EE_SHIFT_CLK, ee_addr); |
| 115 | eeprom_delay(ee_addr); |
| 116 | retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0); |
| 117 | } while (--cmd_len >= 0); |
| 118 | #if 0 |
| 119 | outw(EE_ENB, ee_addr); |
| 120 | #endif |
| 121 | /* Terminate the EEPROM access. */ |
| 122 | outw(EE_ENB & ~EE_CS, ee_addr); |
| 123 | if (debug > 1) |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 124 | printf(" EEPROM result is 0x%5.5x.\n", retval); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 125 | return retval; |
| 126 | } |
| 127 | |
| 128 | static int read_eeprom(long ioaddr, int location, int addr_len) |
| 129 | { |
| 130 | return do_eeprom_cmd(ioaddr, ((EE_READ_CMD << addr_len) | location) |
| 131 | << 16 , 3 + addr_len + 16) & 0xffff; |
| 132 | } |
| 133 | |
| 134 | static void write_eeprom(long ioaddr, int index, int value, int addr_len) |
| 135 | { |
| 136 | long ee_ioaddr = ioaddr + EE_OFFSET; |
| 137 | int i; |
| 138 | |
| 139 | /* Poll for previous op finished. */ |
| 140 | eeprom_busy_poll(ee_ioaddr); /* Typical 0 ticks */ |
| 141 | /* Enable programming modes. */ |
| 142 | do_eeprom_cmd(ioaddr, (0x4f << (addr_len-4)), 3 + addr_len); |
| 143 | /* Do the actual write. */ |
| 144 | do_eeprom_cmd(ioaddr, |
| 145 | (((EE_WRITE_CMD<<addr_len) | index)<<16) | (value & 0xffff), |
| 146 | 3 + addr_len + 16); |
| 147 | /* Poll for write finished. */ |
| 148 | i = eeprom_busy_poll(ee_ioaddr); /* Typical 2000 ticks */ |
| 149 | if (debug) |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 150 | printf(" Write finished after %d ticks.\n", i); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 151 | /* Disable programming. This command is not instantaneous, so we check |
| 152 | for busy before the next op. */ |
| 153 | do_eeprom_cmd(ioaddr, (0x40 << (addr_len-4)), 3 + addr_len); |
| 154 | eeprom_busy_poll(ee_ioaddr); |
| 155 | } |
| 156 | |
| 157 | static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr) |
| 158 | { |
| 159 | unsigned short checksum = 0; |
| 160 | int size_test; |
| 161 | int i; |
| 162 | |
Graeme Russ | 2fe2a97 | 2008-09-07 07:08:42 +1000 | [diff] [blame] | 163 | printf("Resetting i82559 EEPROM @ 0x%08lx ... ", ioaddr); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 164 | |
| 165 | size_test = do_eeprom_cmd(ioaddr, (EE_READ_CMD << 8) << 16, 27); |
| 166 | eeprom_addr_size = (size_test & 0xffe0000) == 0xffe0000 ? 8 : 6; |
| 167 | eeprom_size = 1 << eeprom_addr_size; |
| 168 | |
| 169 | memcpy(eeprom, default_eeprom, sizeof default_eeprom); |
| 170 | |
| 171 | for (i = 0; i < 3; i++) |
| 172 | eeprom[i] = (hwaddr[i*2+1]<<8) + hwaddr[i*2]; |
| 173 | |
| 174 | /* Recalculate the checksum. */ |
| 175 | for (i = 0; i < eeprom_size - 1; i++) |
| 176 | checksum += eeprom[i]; |
| 177 | eeprom[i] = 0xBABA - checksum; |
| 178 | |
| 179 | for (i = 0; i < eeprom_size; i++) |
| 180 | write_eeprom(ioaddr, i, eeprom[i], eeprom_addr_size); |
| 181 | |
| 182 | for (i = 0; i < eeprom_size; i++) |
| 183 | if (read_eeprom(ioaddr, i, eeprom_addr_size) != eeprom[i]) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 184 | printf("failed\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 185 | return 1; |
| 186 | } |
| 187 | |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 188 | printf("done\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 189 | return 0; |
| 190 | } |
| 191 | |
| 192 | static unsigned int hatoi(char *p, char **errp) |
| 193 | { |
| 194 | unsigned int res = 0; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 195 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 196 | while (1) { |
| 197 | switch (*p) { |
| 198 | case 'a': |
| 199 | case 'b': |
| 200 | case 'c': |
| 201 | case 'd': |
| 202 | case 'e': |
| 203 | case 'f': |
| 204 | res |= (*p - 'a' + 10); |
| 205 | break; |
| 206 | case 'A': |
| 207 | case 'B': |
| 208 | case 'C': |
| 209 | case 'D': |
| 210 | case 'E': |
| 211 | case 'F': |
| 212 | res |= (*p - 'A' + 10); |
| 213 | break; |
| 214 | case '0': |
| 215 | case '1': |
| 216 | case '2': |
| 217 | case '3': |
| 218 | case '4': |
| 219 | case '5': |
| 220 | case '6': |
| 221 | case '7': |
| 222 | case '8': |
| 223 | case '9': |
| 224 | res |= (*p - '0'); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 225 | break; |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 226 | default: |
| 227 | if (errp) { |
| 228 | *errp = p; |
| 229 | } |
| 230 | return res; |
| 231 | } |
| 232 | p++; |
| 233 | if (*p == 0) { |
| 234 | break; |
| 235 | } |
| 236 | res <<= 4; |
| 237 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 238 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 239 | if (errp) { |
| 240 | *errp = NULL; |
| 241 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 242 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 243 | return res; |
| 244 | } |
| 245 | |
| 246 | static unsigned char *gethwaddr(char *in, unsigned char *out) |
| 247 | { |
| 248 | char tmp[3]; |
| 249 | int i; |
| 250 | char *err; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 251 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 252 | for (i=0;i<6;i++) { |
| 253 | if (in[i*3+2] == 0 && i == 5) { |
| 254 | out[i] = hatoi(&in[i*3], &err); |
| 255 | if (err) { |
| 256 | return NULL; |
| 257 | } |
| 258 | } else if (in[i*3+2] == ':' && i < 5) { |
| 259 | tmp[0] = in[i*3]; |
| 260 | tmp[1] = in[i*3+1]; |
| 261 | tmp[2] = 0; |
| 262 | out[i] = hatoi(tmp, &err); |
| 263 | if (err) { |
| 264 | return NULL; |
| 265 | } |
| 266 | } else { |
| 267 | return NULL; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 268 | } |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 269 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 270 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 271 | return out; |
| 272 | } |
| 273 | |
| 274 | static u32 |
| 275 | read_config_dword(int bus, int dev, int func, int reg) |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 276 | { |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 277 | u32 res; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 278 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 279 | outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), |
| 280 | 0xcf8); |
| 281 | res = inl(0xcfc); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 282 | outl(0, 0xcf8); |
| 283 | return res; |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 284 | } |
| 285 | |
| 286 | static u16 |
| 287 | read_config_word(int bus, int dev, int func, int reg) |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 288 | { |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 289 | u32 res; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 290 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 291 | outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), |
| 292 | 0xcf8); |
| 293 | res = inw(0xcfc + (reg & 2)); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 294 | outl(0, 0xcf8); |
| 295 | return res; |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 296 | } |
| 297 | |
| 298 | static void |
| 299 | write_config_word(int bus, int dev, int func, int reg, u16 data) |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 300 | { |
| 301 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 302 | outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), |
| 303 | 0xcf8); |
| 304 | outw(data, 0xcfc + (reg & 2)); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 305 | outl(0, 0xcf8); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 306 | } |
| 307 | |
| 308 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 309 | int main (int argc, char *argv[]) |
| 310 | { |
| 311 | unsigned char *eth_addr; |
Graeme Russ | 2fe2a97 | 2008-09-07 07:08:42 +1000 | [diff] [blame] | 312 | uchar buf[6]; |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 313 | int instance; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 314 | |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 315 | app_startup(argv); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 316 | if (argc != 2) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 317 | printf ("call with base Ethernet address\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 318 | return 1; |
| 319 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 320 | |
| 321 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 322 | eth_addr = gethwaddr(argv[1], buf); |
| 323 | if (NULL == eth_addr) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 324 | printf ("Can not parse ethernet address\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 325 | return 1; |
| 326 | } |
| 327 | if (eth_addr[5] & 0x01) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 328 | printf("Base Ethernet address must be even\n"); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 329 | } |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 330 | |
| 331 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 332 | for (instance = 0; instance < 2; instance ++) { |
| 333 | unsigned int io_addr; |
| 334 | unsigned char mac[6]; |
| 335 | int bar1 = read_config_dword(0, 6+instance, 0, 0x14); |
| 336 | if (! (bar1 & 1)) { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 337 | printf("ETH%d is disabled %x\n", instance, bar1); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 338 | } else { |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 339 | printf("ETH%d IO=0x%04x\n", instance, bar1 & ~3); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 340 | } |
| 341 | io_addr = (bar1 & (~3L)); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 342 | |
| 343 | |
| 344 | write_config_word(0, 6+instance, 0, 4, |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 345 | read_config_word(0, 6+instance, 0, 4) | 1); |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 346 | printf("ETH%d CMD %04x\n", instance, |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 347 | read_config_word(0, 6+instance, 0, 4)); |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 348 | |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 349 | memcpy(mac, eth_addr, 6); |
| 350 | mac[5] += instance; |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 351 | |
wdenk | 874ac26 | 2003-07-24 23:38:38 +0000 | [diff] [blame] | 352 | printf("got io=%04x, ha=%02x:%02x:%02x:%02x:%02x:%02x\n", |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 353 | io_addr, mac[0], mac[1], mac[2], |
| 354 | mac[3], mac[4], mac[5]); |
wdenk | abda5ca | 2003-05-31 18:35:21 +0000 | [diff] [blame] | 355 | reset_eeprom(io_addr, mac); |
| 356 | } |
| 357 | return 0; |
| 358 | } |