Bin Meng | 6c9f944 | 2016-05-07 07:46:31 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Google Inc. |
| 3 | * Copyright (C) 2016 Bin Meng <bmeng.cn@gmail.com> |
| 4 | * |
| 5 | * Modified from coreboot src/soc/intel/baytrail/acpi/xhci.asl |
| 6 | * |
| 7 | * SPDX-License-Identifier: GPL-2.0+ |
| 8 | */ |
| 9 | |
| 10 | /* XHCI Controller 0:14.0 */ |
| 11 | |
| 12 | Device (XHCI) |
| 13 | { |
| 14 | Name(_ADR, 0x00140000) |
| 15 | |
| 16 | /* Power Resources for Wake */ |
| 17 | Name(_PRW, Package() { 13, 3 }) |
| 18 | |
| 19 | /* Highest D state in S3 state */ |
| 20 | Name(_S3D, 3) |
| 21 | |
| 22 | Device (RHUB) |
| 23 | { |
| 24 | Name(_ADR, 0x00000000) |
| 25 | |
| 26 | Device (PRT1) { Name(_ADR, 1) } /* USB Port 0 */ |
| 27 | Device (PRT2) { Name(_ADR, 2) } /* USB Port 1 */ |
| 28 | Device (PRT3) { Name(_ADR, 3) } /* USB Port 2 */ |
| 29 | Device (PRT4) { Name(_ADR, 4) } /* USB Port 3 */ |
| 30 | } |
| 31 | } |