stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004 |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <command.h> |
| 10 | #include <malloc.h> |
| 11 | #include <asm/m5249.h> |
Matthias Fuchs | 5dde4e2 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 12 | #include <asm/io.h> |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 13 | |
| 14 | |
| 15 | /* Prototypes */ |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 16 | int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len); |
| 17 | int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len); |
| 18 | |
| 19 | |
| 20 | #if 0 |
| 21 | #define FPGA_DEBUG |
| 22 | #endif |
| 23 | |
| 24 | /* predefine these here for FPGA programming (before including fpga.c) */ |
| 25 | #define SET_FPGA(data) mbar2_writeLong(MCFSIM_GPIO1_OUT, data) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 26 | #define FPGA_DONE_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_DONE) |
| 27 | #define FPGA_INIT_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CONFIG_SYS_FPGA_INIT) |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 28 | #define FPGA_PROG_ACTIVE_HIGH /* on this platform is PROG active high! */ |
| 29 | #define out32(a,b) /* nothing to do (gpio already configured) */ |
| 30 | |
| 31 | |
| 32 | /* fpga configuration data - generated by bin2cc */ |
| 33 | const unsigned char fpgadata[] = |
| 34 | { |
| 35 | #include "fpgadata.c" |
| 36 | }; |
| 37 | |
| 38 | /* |
| 39 | * include common fpga code (for esd boards) |
| 40 | */ |
| 41 | #include "../common/fpga.c" |
| 42 | |
| 43 | |
| 44 | int checkboard (void) { |
| 45 | ulong val; |
wdenk | 07d7e6b | 2004-12-16 21:44:03 +0000 | [diff] [blame] | 46 | uchar val8; |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 47 | |
| 48 | puts ("Board: "); |
| 49 | puts("esd TASREG"); |
| 50 | val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf; |
| 51 | printf(" (Switch=%1X)\n", val8); |
| 52 | |
| 53 | /* |
| 54 | * Set LED on |
| 55 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 56 | val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CONFIG_SYS_GPIO1_LED; |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 57 | mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */ |
| 58 | |
| 59 | return 0; |
| 60 | }; |
| 61 | |
| 62 | |
Becky Bruce | bd99ae7 | 2008-06-09 16:03:40 -0500 | [diff] [blame] | 63 | phys_size_t initdram (int board_type) { |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 64 | unsigned long junk = 0xa5a59696; |
| 65 | |
| 66 | /* |
| 67 | * Note: |
| 68 | * RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1 |
| 69 | */ |
| 70 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 71 | #ifdef CONFIG_SYS_FAST_CLK |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 72 | /* |
| 73 | * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K) |
| 74 | * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39 |
| 75 | */ |
| 76 | mbar_writeShort(MCFSIM_DCR, 0x8239); |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 77 | #elif CONFIG_SYS_PLL_BYPASS |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 78 | /* |
| 79 | * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K) |
| 80 | * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02 |
| 81 | */ |
| 82 | mbar_writeShort(MCFSIM_DCR, 0x8202); |
| 83 | #else |
| 84 | /* |
| 85 | * Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K) |
| 86 | * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles) |
| 87 | */ |
| 88 | mbar_writeShort(MCFSIM_DCR, 0x8222); |
| 89 | #endif |
| 90 | |
| 91 | /* |
| 92 | * SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port), |
| 93 | * PM=1 (continuous page mode) |
| 94 | */ |
| 95 | |
| 96 | /* RE=0 (keep auto-refresh disabled while setting up registers) */ |
| 97 | mbar_writeLong(MCFSIM_DACR0, 0x00003324); |
| 98 | |
| 99 | /* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */ |
| 100 | mbar_writeLong(MCFSIM_DMR0, 0x01fc0001); |
| 101 | |
| 102 | /** Precharge sequence **/ |
| 103 | mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */ |
Matthias Fuchs | 5dde4e2 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 104 | out_be32((void *)0, junk); /* write to a memory location to init. precharge */ |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 105 | udelay(0x10); /* Allow several Precharge cycles */ |
| 106 | |
| 107 | /** Refresh Sequence **/ |
| 108 | mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */ |
| 109 | udelay(0x7d0); /* Allow gobs of refresh cycles */ |
| 110 | |
| 111 | /** Mode Register initialization **/ |
| 112 | mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */ |
Matthias Fuchs | 5dde4e2 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 113 | out_be32((void *)0x800, junk); /* Access RAM to initialize the mode register */ |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 114 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 115 | return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024; |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 116 | }; |
| 117 | |
| 118 | |
| 119 | int testdram (void) { |
| 120 | /* TODO: XXX XXX XXX */ |
| 121 | printf ("DRAM test not implemented!\n"); |
| 122 | |
| 123 | return (0); |
| 124 | } |
| 125 | |
| 126 | |
| 127 | int misc_init_r (void) |
| 128 | { |
| 129 | unsigned char *dst; |
| 130 | ulong len = sizeof(fpgadata); |
| 131 | int status; |
| 132 | int index; |
| 133 | int i; |
| 134 | uchar buf[8]; |
| 135 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 136 | dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE); |
| 137 | if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) { |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 138 | printf ("GUNZIP ERROR - must RESET board to recover\n"); |
| 139 | do_reset (NULL, 0, 0, NULL); |
| 140 | } |
| 141 | |
| 142 | status = fpga_boot(dst, len); |
| 143 | if (status != 0) { |
| 144 | printf("\nFPGA: Booting failed "); |
| 145 | switch (status) { |
| 146 | case ERROR_FPGA_PRG_INIT_LOW: |
| 147 | printf("(Timeout: INIT not low after asserting PROGRAM*)\n "); |
| 148 | break; |
| 149 | case ERROR_FPGA_PRG_INIT_HIGH: |
| 150 | printf("(Timeout: INIT not high after deasserting PROGRAM*)\n "); |
| 151 | break; |
| 152 | case ERROR_FPGA_PRG_DONE: |
| 153 | printf("(Timeout: DONE not high after programming FPGA)\n "); |
| 154 | break; |
| 155 | } |
| 156 | |
| 157 | /* display infos on fpgaimage */ |
| 158 | index = 15; |
| 159 | for (i=0; i<4; i++) { |
| 160 | len = dst[index]; |
| 161 | printf("FPGA: %s\n", &(dst[index+1])); |
| 162 | index += len+3; |
| 163 | } |
| 164 | putc ('\n'); |
| 165 | /* delayed reboot */ |
| 166 | for (i=20; i>0; i--) { |
| 167 | printf("Rebooting in %2d seconds \r",i); |
| 168 | for (index=0;index<1000;index++) |
| 169 | udelay(1000); |
| 170 | } |
| 171 | putc ('\n'); |
| 172 | do_reset(NULL, 0, 0, NULL); |
| 173 | } |
| 174 | |
| 175 | puts("FPGA: "); |
| 176 | |
| 177 | /* display infos on fpgaimage */ |
| 178 | index = 15; |
| 179 | for (i=0; i<4; i++) { |
| 180 | len = dst[index]; |
| 181 | printf("%s ", &(dst[index+1])); |
| 182 | index += len+3; |
| 183 | } |
| 184 | putc ('\n'); |
| 185 | |
| 186 | free(dst); |
| 187 | |
| 188 | /* |
| 189 | * |
| 190 | */ |
| 191 | buf[0] = 0x00; |
| 192 | buf[1] = 0x32; |
| 193 | buf[2] = 0x3f; |
| 194 | i2c_write(0x38, 0, 0, buf, 3); |
| 195 | |
| 196 | return (0); |
| 197 | } |
| 198 | |
| 199 | |
| 200 | #if 1 /* test-only: board specific test commands */ |
| 201 | int i2c_probe(uchar addr); |
| 202 | |
| 203 | /* |
| 204 | */ |
Wolfgang Denk | 6262d021 | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 205 | int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 206 | { |
| 207 | ulong addr; |
| 208 | |
| 209 | if (argc < 2) { |
| 210 | puts("ERROR!\n"); |
| 211 | return -1; |
| 212 | } |
| 213 | |
| 214 | addr = simple_strtol (argv[1], NULL, 16); |
| 215 | |
Peter Tyser | 469cde4 | 2009-04-18 22:34:03 -0500 | [diff] [blame] | 216 | printf("i2c probe looping on addr 0x%lx (cntrl-c aborts)...\n", addr); |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 217 | |
| 218 | for (;;) { |
| 219 | i2c_probe(addr); |
| 220 | |
| 221 | /* Abort if ctrl-c was pressed */ |
| 222 | if (ctrlc()) { |
| 223 | puts("\nAbort\n"); |
| 224 | return 0; |
| 225 | } |
| 226 | |
| 227 | udelay(1000); |
| 228 | } |
| 229 | |
| 230 | return 0; |
| 231 | } |
| 232 | U_BOOT_CMD( |
| 233 | iploop, 2, 1, do_iploop, |
Peter Tyser | 469cde4 | 2009-04-18 22:34:03 -0500 | [diff] [blame] | 234 | "i2c probe loop <addr>", |
Wolfgang Denk | c54781c | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 235 | "" |
| 236 | ); |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 237 | |
| 238 | /* |
| 239 | */ |
Wolfgang Denk | 6262d021 | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 240 | int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 241 | { |
| 242 | uchar buf[8]; |
| 243 | |
Matthias Fuchs | 5dde4e2 | 2009-02-20 10:19:19 +0100 | [diff] [blame] | 244 | out_be16((void *)0xe0000000, 0x4000); |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 245 | |
| 246 | udelay(5000); /* wait for 5ms */ |
| 247 | |
| 248 | buf[0] = 0x10; |
| 249 | buf[1] = 0x07; |
| 250 | buf[2] = 0x03; |
| 251 | i2c_write(0x10, 0, 0, buf, 3); |
| 252 | |
| 253 | buf[0] = 0x10; |
| 254 | buf[1] = 0x01; |
| 255 | buf[2] = 0x80; |
| 256 | i2c_write(0x10, 0, 0, buf, 3); |
| 257 | |
| 258 | buf[0] = 0x10; |
| 259 | buf[1] = 0x02; |
| 260 | buf[2] = 0x03; |
| 261 | i2c_write(0x10, 0, 0, buf, 3); |
| 262 | |
| 263 | buf[0] = 0x10; |
| 264 | buf[1] = 0x03; |
| 265 | buf[2] = 0x29; |
| 266 | i2c_write(0x10, 0, 0, buf, 3); |
| 267 | |
| 268 | buf[0] = 0x10; |
| 269 | buf[1] = 0x04; |
| 270 | buf[2] = 0x00; |
| 271 | i2c_write(0x10, 0, 0, buf, 3); |
| 272 | |
| 273 | buf[0] = 0x10; |
| 274 | buf[1] = 0x05; |
| 275 | buf[2] = 0x00; |
| 276 | i2c_write(0x10, 0, 0, buf, 3); |
| 277 | |
| 278 | buf[0] = 0x10; |
| 279 | buf[1] = 0x07; |
| 280 | buf[2] = 0x02; |
| 281 | i2c_write(0x10, 0, 0, buf, 3); |
| 282 | |
| 283 | return 0; |
| 284 | } |
| 285 | U_BOOT_CMD( |
| 286 | codec, 1, 1, do_codec, |
Peter Tyser | dfb72b8 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 287 | "Enable codec", |
Wolfgang Denk | c54781c | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 288 | "" |
| 289 | ); |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 290 | |
| 291 | /* |
| 292 | */ |
Wolfgang Denk | 6262d021 | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 293 | int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 294 | { |
| 295 | ulong addr; |
| 296 | ulong instr; |
| 297 | ulong cntrl; |
| 298 | ulong data; |
| 299 | uchar buf[8]; |
| 300 | |
| 301 | if (argc < 5) { |
| 302 | puts("ERROR!\n"); |
| 303 | return -1; |
| 304 | } |
| 305 | |
| 306 | addr = simple_strtol (argv[1], NULL, 16); |
| 307 | instr = simple_strtol (argv[2], NULL, 16); |
| 308 | cntrl = simple_strtol (argv[3], NULL, 16); |
| 309 | data = simple_strtol (argv[4], NULL, 16); |
| 310 | |
| 311 | buf[0] = (uchar)instr; |
| 312 | buf[1] = (uchar)cntrl; |
| 313 | buf[2] = (uchar)data; |
| 314 | i2c_write(addr, 0, 0, buf, 3); |
| 315 | |
| 316 | return 0; |
| 317 | } |
| 318 | U_BOOT_CMD( |
| 319 | saa, 5, 1, do_saa, |
Peter Tyser | dfb72b8 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 320 | "Write to SAA1064 <addr> <instr> <cntrl> <data>", |
Wolfgang Denk | c54781c | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 321 | "" |
| 322 | ); |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 323 | |
| 324 | /* |
| 325 | */ |
Wolfgang Denk | 6262d021 | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 326 | int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 327 | { |
| 328 | ulong addr; |
| 329 | ulong data0; |
| 330 | ulong data1; |
| 331 | ulong data2; |
| 332 | ulong data3; |
| 333 | uchar buf[8]; |
| 334 | int cnt; |
| 335 | |
| 336 | if (argc < 3) { |
| 337 | puts("ERROR!\n"); |
| 338 | return -1; |
| 339 | } |
| 340 | |
| 341 | addr = simple_strtol (argv[1], NULL, 16); |
| 342 | cnt = simple_strtol (argv[2], NULL, 16); |
| 343 | data0 = simple_strtol (argv[3], NULL, 16); |
| 344 | data1 = simple_strtol (argv[4], NULL, 16); |
| 345 | data2 = simple_strtol (argv[5], NULL, 16); |
| 346 | data3 = simple_strtol (argv[6], NULL, 16); |
| 347 | |
| 348 | printf("Writing %d bytes to device %lx!\n", cnt, addr); |
| 349 | buf[0] = (uchar)data0; |
| 350 | buf[1] = (uchar)data1; |
| 351 | buf[2] = (uchar)data2; |
| 352 | buf[3] = (uchar)data3; |
| 353 | i2c_write(addr, 0, 0, buf, cnt); |
| 354 | |
| 355 | return 0; |
| 356 | } |
| 357 | U_BOOT_CMD( |
| 358 | iwrite, 6, 1, do_iwrite, |
Peter Tyser | dfb72b8 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 359 | "Write n bytes to I2C-device", |
Wolfgang Denk | c54781c | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 360 | "addr cnt data0 ... datan" |
| 361 | ); |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 362 | |
| 363 | /* |
| 364 | */ |
Wolfgang Denk | 6262d021 | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 365 | int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 366 | { |
| 367 | ulong addr; |
| 368 | ulong cnt; |
| 369 | uchar buf[32]; |
| 370 | int i; |
| 371 | |
| 372 | if (argc < 3) { |
| 373 | puts("ERROR!\n"); |
| 374 | return -1; |
| 375 | } |
| 376 | |
| 377 | addr = simple_strtol (argv[1], NULL, 16); |
| 378 | cnt = simple_strtol (argv[2], NULL, 16); |
| 379 | |
| 380 | i2c_read(addr, 0, 0, buf, cnt); |
| 381 | printf("I2C Data:"); |
| 382 | for (i=0; i<cnt; i++) { |
| 383 | printf(" %02X", buf[i]); |
| 384 | } |
| 385 | printf("\n"); |
| 386 | |
| 387 | return 0; |
| 388 | } |
| 389 | U_BOOT_CMD( |
| 390 | iread, 3, 1, do_iread, |
Peter Tyser | dfb72b8 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 391 | "Read from I2C <addr> <cnt>", |
Wolfgang Denk | c54781c | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 392 | "" |
| 393 | ); |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 394 | |
| 395 | /* |
| 396 | */ |
Wolfgang Denk | 6262d021 | 2010-06-28 22:00:46 +0200 | [diff] [blame] | 397 | int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 398 | { |
| 399 | ulong addr; |
| 400 | uchar buf[32]; |
| 401 | int cnt; |
| 402 | |
| 403 | if (argc < 2) { |
| 404 | puts("ERROR!\n"); |
| 405 | return -1; |
| 406 | } |
| 407 | |
| 408 | addr = simple_strtol (argv[1], NULL, 16); |
| 409 | cnt = 1; |
| 410 | |
| 411 | printf("iread looping on addr 0x%lx (cntrl-c aborts)...\n", addr); |
| 412 | |
| 413 | for (;;) { |
| 414 | i2c_read(addr, 0, 0, buf, cnt); |
| 415 | |
| 416 | /* Abort if ctrl-c was pressed */ |
| 417 | if (ctrlc()) { |
| 418 | puts("\nAbort\n"); |
| 419 | return 0; |
| 420 | } |
| 421 | |
| 422 | udelay(3000); |
| 423 | } |
| 424 | |
| 425 | return 0; |
| 426 | } |
| 427 | U_BOOT_CMD( |
| 428 | ireadl, 2, 1, do_ireadl, |
Peter Tyser | dfb72b8 | 2009-01-27 18:03:12 -0600 | [diff] [blame] | 429 | "Read-loop from I2C <addr>", |
Wolfgang Denk | c54781c | 2009-05-24 17:06:54 +0200 | [diff] [blame] | 430 | "" |
| 431 | ); |
stroese | 4536e9b | 2004-12-16 18:24:06 +0000 | [diff] [blame] | 432 | #endif |