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Chander Kashyapbfef54d2011-05-24 20:02:56 +00001/*
2 * Copyright (C) 2011 Samsung Electronics
3 *
Chander Kashyap4131a772011-12-06 23:34:12 +00004 * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board.
Chander Kashyapbfef54d2011-05-24 20:02:56 +00005 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Chander Kashyapbfef54d2011-05-24 20:02:56 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Simon Glass05b3bac32014-10-07 22:01:49 -060012#include "exynos4-common.h"
13
14#undef CONFIG_BOARD_COMMON
Marek Vasutbc623f22015-08-19 23:27:26 +020015#undef CONFIG_USB_GADGET_DWC2_OTG_PHY
Simon Glass05b3bac32014-10-07 22:01:49 -060016#undef CONFIG_REVISION_TAG
Simon Glass05b3bac32014-10-07 22:01:49 -060017
Chander Kashyapbfef54d2011-05-24 20:02:56 +000018/* High Level Configuration Options */
Chander Kashyap4131a772011-12-06 23:34:12 +000019#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyapbfef54d2011-05-24 20:02:56 +000020#define CONFIG_SMDKV310 1 /* working with SMDKV310*/
21
Chander Kashyap0f3e95f2011-09-20 21:25:01 +000022/* Mach Type */
23#define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310
24
Chander Kashyapbfef54d2011-05-24 20:02:56 +000025#define CONFIG_SYS_SDRAM_BASE 0x40000000
Chander Kashyapbfef54d2011-05-24 20:02:56 +000026
Chander Kashyapbfef54d2011-05-24 20:02:56 +000027/* Handling Sleep Mode*/
28#define S5P_CHECK_SLEEP 0x00000BAD
29#define S5P_CHECK_DIDLE 0xBAD00000
Rajeshwari Shindebed24422013-07-04 12:29:17 +053030#define S5P_CHECK_LPA 0xABAD0000
Chander Kashyapbfef54d2011-05-24 20:02:56 +000031
Chander Kashyapbfef54d2011-05-24 20:02:56 +000032/* select serial console configuration */
Chander Kashyapbfef54d2011-05-24 20:02:56 +000033#define CONFIG_SERIAL1 1 /* use SERIAL 1 */
Chander Kashyap4131a772011-12-06 23:34:12 +000034#define EXYNOS4_DEFAULT_UART_OFFSET 0x010000
Chander Kashyapbfef54d2011-05-24 20:02:56 +000035
Chander Kashyapbfef54d2011-05-24 20:02:56 +000036/* allow to overwrite serial and ethaddr */
37#define CONFIG_ENV_OVERWRITE
38
Chander Kashyap0cd984c2011-09-20 21:25:03 +000039/* MMC SPL */
Rajeshwari Shindebed24422013-07-04 12:29:17 +053040#define CONFIG_SKIP_LOWLEVEL_INIT
Chander Kashyape8d043e2011-09-20 21:25:04 +000041#define COPY_BL2_FNPTR_ADDR 0x00002488
Chander Kashyapbfef54d2011-05-24 20:02:56 +000042
Inderpal Singh4a699c72013-04-04 23:09:21 +000043#define CONFIG_SPL_TEXT_BASE 0x02021410
44
Chander Kashyapbfef54d2011-05-24 20:02:56 +000045#define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000"
46
47/* Miscellaneous configurable options */
Chander Kashyapbfef54d2011-05-24 20:02:56 +000048#define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
Chander Kashyapbfef54d2011-05-24 20:02:56 +000049/* memtest works on */
50#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
51#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
52#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
53
Chander Kashyapbfef54d2011-05-24 20:02:56 +000054/* SMDKV310 has 4 bank of DRAM */
55#define CONFIG_NR_DRAM_BANKS 4
56#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
57#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
58#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
59#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
60#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
61#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
62#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
63#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
64#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
65
66/* FLASH and environment organization */
Chander Kashyapbfef54d2011-05-24 20:02:56 +000067
Chander Kashyapbfef54d2011-05-24 20:02:56 +000068#define CONFIG_CLK_1000_400_200
69
70/* MIU (Memory Interleaving Unit) */
71#define CONFIG_MIU_2BIT_INTERLEAVED
72
Chander Kashyapbfef54d2011-05-24 20:02:56 +000073#define CONFIG_SYS_MMC_ENV_DEV 0
74#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
75#define RESERVE_BLOCK_SIZE (512)
76#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
77#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
Chander Kashyapbfef54d2011-05-24 20:02:56 +000078
Rajeshwari Shindebed24422013-07-04 12:29:17 +053079#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
80
81#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyapbfef54d2011-05-24 20:02:56 +000082
Bin Meng75574052016-02-05 19:30:11 -080083/* U-Boot copy size from boot Media to DRAM.*/
Chander Kashyapbfef54d2011-05-24 20:02:56 +000084#define COPY_BL2_SIZE 0x80000
85#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
86#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
87
88/* Ethernet Controllor Driver */
89#ifdef CONFIG_CMD_NET
Chander Kashyapbfef54d2011-05-24 20:02:56 +000090#define CONFIG_ENV_SROM_BANK 1
91#endif /*CONFIG_CMD_NET*/
Thomas Abraham4cd38a42011-06-03 22:52:17 +000092
Chander Kashyapbfef54d2011-05-24 20:02:56 +000093#endif /* __CONFIG_H */