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git01.mediatek.com / filogic / uboot / f6e6e1acae1ea1870e52d73c8ef35840bb03ce0a / . / configs / ls1012ardb_qspi_defconfig
blob: d734e2ed6f621ff199ab7684454b173c85547003 [file] [log] [blame]
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]1CONFIG_ARM=y
2CONFIG_TARGET_LS1012ARDB=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x40100000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x40000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame^]5CONFIG_ENV_SECT_SIZE=0x40000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]6CONFIG_ENV_OFFSET=0x300000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame^]7CONFIG_FSL_LS_PPA=y
8CONFIG_QSPI_AHB_INIT=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]9CONFIG_NR_DRAM_BANKS=2
Tom Rinid9669f12018-08-07 21:40:14 -0400[diff] [blame]10CONFIG_AHCI=y
Tom Rinib9baf7f2017-12-18 20:19:09 -0500[diff] [blame]11CONFIG_DISTRO_DEFAULTS=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]12# CONFIG_SYS_MALLOC_F is not set
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]13CONFIG_FIT_VERBOSE=y
14CONFIG_OF_BOARD_SETUP=y
15CONFIG_OF_STDOUT_VIA_ALIAS=y
16CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
Tom Rini0d130ad2016-06-27 22:40:17 -0400[diff] [blame]17CONFIG_QSPI_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]18CONFIG_BOOTDELAY=10
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]19CONFIG_USE_BOOTARGS=y
20CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250000"
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]21# CONFIG_DISPLAY_BOARDINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]22CONFIG_DISPLAY_BOARDINFO_LATE=y
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]23CONFIG_CMD_GREPENV=y
Mario Six00518992018-03-28 14:38:14 +0200[diff] [blame]24CONFIG_CMD_MEMTEST=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]25CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]26CONFIG_CMD_I2C=y
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]27CONFIG_CMD_MMC=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]28CONFIG_CMD_PCI=y
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]29CONFIG_CMD_USB=y
30# CONFIG_CMD_SETEXPR is not set
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]31CONFIG_CMD_CACHE=y
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]32CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]33CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]34CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]35CONFIG_ENV_ADDR=0x40300000
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]36CONFIG_NET_RANDOM_ETHADDR=y
37CONFIG_DM=y
Tom Rinid9669f12018-08-07 21:40:14 -0400[diff] [blame]38CONFIG_SATA_CEVA=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]39CONFIG_DM_MMC=y
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]40CONFIG_FSL_ESDHC=y
Miquel Raynal803baa22019-10-03 19:50:08 +0200[diff] [blame]41CONFIG_MTD=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]42CONFIG_DM_SPI_FLASH=y
Ashish Kumar820fa952019-05-31 16:03:28 +0530[diff] [blame]43# CONFIG_SPI_FLASH_BAR is not set
Ashish Kumar3c2065d2018-06-26 14:48:30 +0530[diff] [blame]44# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]45CONFIG_FSL_PFE=y
Calvin Johnson0e6101a2018-03-08 15:30:35 +0530[diff] [blame]46CONFIG_DM_ETH=y
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]47CONFIG_E1000=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]48CONFIG_PCI=y
49CONFIG_DM_PCI=y
50CONFIG_DM_PCI_COMPAT=y
51CONFIG_PCIE_LAYERSCAPE=y
Tom Rinid9669f12018-08-07 21:40:14 -0400[diff] [blame]52CONFIG_DM_SCSI=y
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]53CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]54CONFIG_SPI=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]55CONFIG_DM_SPI=y
Prabhakar Kushwahaa315c662016-06-03 18:41:35 +0530[diff] [blame]56CONFIG_FSL_DSPI=y
Ashish Kumar820fa952019-05-31 16:03:28 +0530[diff] [blame]57CONFIG_FSL_QSPI=y
Tom Rinifaffdfd2016-06-06 10:04:58 -0400[diff] [blame]58CONFIG_USB=y
Tang Yuantian67df7de2016-12-27 10:24:45 +0800[diff] [blame]59CONFIG_DM_USB=y
Tom Rinifaffdfd2016-06-06 10:04:58 -0400[diff] [blame]60CONFIG_USB_XHCI_HCD=y
61CONFIG_USB_XHCI_DWC3=y