Blame - arch/sparc/Kconfig - filogic/uboot

blob: 1d1347b167539d9c8fa90422d5a9e080a7340028 [file] [log] [blame]

Masahiro Yamada	d3ae678	2014-07-30 14:08:14 +0900	[diff] [blame]	1	menu "SPARC architecture"
				2	depends on SPARC
				3
Masahiro Yamada	f54d7d6	2014-10-30 15:30:55 +0900	[diff] [blame]	4	config LEON
				5	bool
				6
				7	config LEON2
				8	bool
				9	select LEON
				10
				11	config LEON3
				12	bool
				13	select LEON
				14
Francois Retief	f6b3d1e	2015-11-01 15:40:00 +0200	[diff] [blame^]	15	config SYS_SPARC_NWINDOWS
				16	int "Number of SPARC register windows"
				17	range 2 32
				18	default "8"
				19	help
				20	Specify the number of SPARC register windows implemented by this
				21	processor. A SPARC implementation can have from 2 to 32 windows.
				22	If unsure, choose 8.
				23
Masahiro Yamada	d3ae678	2014-07-30 14:08:14 +0900	[diff] [blame]	24	choice
Masahiro Yamada	14eaac1	2014-10-30 15:30:54 +0900	[diff] [blame]	25	prompt "Board select"
Joe Hershberger	f069960	2015-05-12 14:46:23 -0500	[diff] [blame]	26	optional
Masahiro Yamada	d3ae678	2014-07-30 14:08:14 +0900	[diff] [blame]	27
				28	config TARGET_GRSIM_LEON2
Masahiro Yamada	14eaac1	2014-10-30 15:30:54 +0900	[diff] [blame]	29	bool "GRSIM simulating a LEON2 board"
Masahiro Yamada	f54d7d6	2014-10-30 15:30:55 +0900	[diff] [blame]	30	select LEON2
Masahiro Yamada	d3ae678	2014-07-30 14:08:14 +0900	[diff] [blame]	31
				32	config TARGET_GR_CPCI_AX2000
Masahiro Yamada	14eaac1	2014-10-30 15:30:54 +0900	[diff] [blame]	33	bool "Gaisler GR-CPCI-AX2000 board"
Masahiro Yamada	f54d7d6	2014-10-30 15:30:55 +0900	[diff] [blame]	34	select LEON3
Masahiro Yamada	d3ae678	2014-07-30 14:08:14 +0900	[diff] [blame]	35
				36	config TARGET_GR_EP2S60
Masahiro Yamada	14eaac1	2014-10-30 15:30:54 +0900	[diff] [blame]	37	bool "Gaisler Template design for Altera NIOS board with Stratix EP2S60"
Masahiro Yamada	f54d7d6	2014-10-30 15:30:55 +0900	[diff] [blame]	38	select LEON3
Masahiro Yamada	14eaac1	2014-10-30 15:30:54 +0900	[diff] [blame]	39	help
				40	Gaisler Research AB's Template design (GPL Open Source SPARC/LEON3
				41	96MHz) for Altera NIOS Development board Stratix II edition,
				42	with the FPGA device EP2S60.
Masahiro Yamada	d3ae678	2014-07-30 14:08:14 +0900	[diff] [blame]	43
				44	config TARGET_GR_XC3S_1500
Masahiro Yamada	14eaac1	2014-10-30 15:30:54 +0900	[diff] [blame]	45	bool "Gaisler GR-XC3S-1500 spartan board"
Masahiro Yamada	f54d7d6	2014-10-30 15:30:55 +0900	[diff] [blame]	46	select LEON3
Masahiro Yamada	d3ae678	2014-07-30 14:08:14 +0900	[diff] [blame]	47
				48	config TARGET_GRSIM
Masahiro Yamada	14eaac1	2014-10-30 15:30:54 +0900	[diff] [blame]	49	bool "GRSIM simulating a LEON3 GR-XC3S-1500 board"
Masahiro Yamada	f54d7d6	2014-10-30 15:30:55 +0900	[diff] [blame]	50	select LEON3
Masahiro Yamada	d3ae678	2014-07-30 14:08:14 +0900	[diff] [blame]	51
				52	endchoice
				53
Masahiro Yamada	b37a03d	2014-10-30 15:30:57 +0900	[diff] [blame]	54	config SYS_ARCH
				55	default "sparc"
				56
				57	config SYS_CPU
				58	default "leon2" if LEON2
				59	default "leon3" if LEON3
				60
				61	config SYS_VENDOR
				62	default "gaisler"
				63
Masahiro Yamada	d3ae678	2014-07-30 14:08:14 +0900	[diff] [blame]	64	source "board/gaisler/gr_cpci_ax2000/Kconfig"
				65	source "board/gaisler/gr_ep2s60/Kconfig"
				66	source "board/gaisler/gr_xc3s_1500/Kconfig"
				67	source "board/gaisler/grsim/Kconfig"
				68	source "board/gaisler/grsim_leon2/Kconfig"
				69
				70	endmenu