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git01.mediatek.com / filogic / uboot / f6afe7273876bb2c95ebf1e19e060e5a644f8b8d / . / cpu / mcf532x / start.S
blob: d36d076cf32d39a3b85077068fd9a0d609308274 [file] [log] [blame]
TsiChung Liewf6afe722007-06-18 13:50:13 -0500[diff] [blame^]1/*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <config.h>
25#include "version.h"
26
27#ifndef CONFIG_IDENT_STRING
28#define CONFIG_IDENT_STRING ""
29#endif
30
31#define _START _start
32#define _FAULT _fault
33
34
35#define SAVE_ALL \
36 move.w #0x2700,%sr; /* disable intrs */ \
37 subl #60,%sp; /* space for 15 regs */ \
38 moveml %d0-%d7/%a0-%a6,%sp@;
39
40#define RESTORE_ALL \
41 moveml %sp@,%d0-%d7/%a0-%a6; \
42 addl #60,%sp; /* space for 15 regs */ \
43 rte;
44
45
46.text
47/*
48 * Vector table. This is used for initial platform startup.
49 * These vectors are to catch any un-intended traps.
50 */
51_vectors:
52
53INITSP: .long 0x00000000 /* Initial SP */
54INITPC: .long _START /* Initial PC */
55vector02: .long _FAULT /* Access Error */
56vector03: .long _FAULT /* Address Error */
57vector04: .long _FAULT /* Illegal Instruction */
58vector05: .long _FAULT /* Reserved */
59vector06: .long _FAULT /* Reserved */
60vector07: .long _FAULT /* Reserved */
61vector08: .long _FAULT /* Privilege Violation */
62vector09: .long _FAULT /* Trace */
63vector0A: .long _FAULT /* Unimplemented A-Line */
64vector0B: .long _FAULT /* Unimplemented F-Line */
65vector0C: .long _FAULT /* Debug Interrupt */
66vector0D: .long _FAULT /* Reserved */
67vector0E: .long _FAULT /* Format Error */
68vector0F: .long _FAULT /* Unitialized Int. */
69
70/* Reserved */
71vector10_17:
72.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73
74vector18: .long _FAULT /* Spurious Interrupt */
75vector19: .long _FAULT /* Autovector Level 1 */
76vector1A: .long _FAULT /* Autovector Level 2 */
77vector1B: .long _FAULT /* Autovector Level 3 */
78vector1C: .long _FAULT /* Autovector Level 4 */
79vector1D: .long _FAULT /* Autovector Level 5 */
80vector1E: .long _FAULT /* Autovector Level 6 */
81vector1F: .long _FAULT /* Autovector Level 7 */
82
83/* TRAP #0 - #15 */
84vector20_2F:
85.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87
88/* Reserved */
89vector30_3F:
90.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92
93vector64_127:
94.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102
103vector128_191:
104.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
105.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112
113vector192_255:
114.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
115.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
116.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
117.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
118.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
119.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
120.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
121.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
122
123 .text
124
125 .globl _start
126_start:
127 nop
128 nop
129 move.w #0x2700,%sr /* Mask off Interrupt */
130
131 /* Set vector base register at the beginning of the Flash */
132 move.l #CFG_FLASH_BASE, %d0
133 movec %d0, %VBR
134
135 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
136 movec %d0, %RAMBAR0
137
138 /* invalidate and disable cache */
139 move.l #0x01000000, %d0 /* Invalidate cache cmd */
140 movec %d0, %CACR /* Invalidate cache */
141 move.l #0, %d0
142 movec %d0, %ACR0
143 movec %d0, %ACR1
144
145 /* initialize general use internal ram */
146 move.l #0, %d0
147 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
148 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a2
149 move.l %d0, (%a1)
150 move.l %d0, (%a2)
151
152 /* set stackpointer to end of internal ram to get some stackspace for the first c-code */
153 move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
154 clr.l %sp@-
155
156 move.l #__got_start, %a5 /* put relocation table address to a5 */
157
158 bsr cpu_init_f /* run low-level CPU init code (from flash) */
159 bsr board_init_f /* run low-level board init code (from flash) */
160
161 /* board_init_f() does not return */
162
163/*------------------------------------------------------------------------------*/
164
165/*
166 * void relocate_code (addr_sp, gd, addr_moni)
167 *
168 * This "function" does not return, instead it continues in RAM
169 * after relocating the monitor code.
170 *
171 * r3 = dest
172 * r4 = src
173 * r5 = length in bytes
174 * r6 = cachelinesize
175 */
176 .globl relocate_code
177relocate_code:
178 link.w %a6,#0
179 move.l 8(%a6), %sp /* set new stack pointer */
180
181 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
182 move.l 16(%a6), %a0 /* Save copy of Destination Address */
183
184 move.l #CFG_MONITOR_BASE, %a1
185 move.l #__init_end, %a2
186 move.l %a0, %a3
187
188 /* copy the code to RAM */
1891:
190 move.l (%a1)+, (%a3)+
191 cmp.l %a1,%a2
192 bgt.s 1b
193
194/*
195 * We are done. Do not return, instead branch to second part of board
196 * initialization, now running from RAM.
197 */
198 move.l %a0, %a1
199 add.l #(in_ram - CFG_MONITOR_BASE), %a1
200 jmp (%a1)
201
202in_ram:
203
204clear_bss:
205 /*
206 * Now clear BSS segment
207 */
208 move.l %a0, %a1
209 add.l #(_sbss - CFG_MONITOR_BASE),%a1
210 move.l %a0, %d1
211 add.l #(_ebss - CFG_MONITOR_BASE),%d1
2126:
213 clr.l (%a1)+
214 cmp.l %a1,%d1
215 bgt.s 6b
216
217 /*
218 * fix got table in RAM
219 */
220 move.l %a0, %a1
221 add.l #(__got_start - CFG_MONITOR_BASE),%a1
222 move.l %a1,%a5 /* * fix got pointer register a5 */
223
224 move.l %a0, %a2
225 add.l #(__got_end - CFG_MONITOR_BASE),%a2
226
2277:
228 move.l (%a1),%d1
229 sub.l #_start,%d1
230 add.l %a0,%d1
231 move.l %d1,(%a1)+
232 cmp.l %a2, %a1
233 bne 7b
234
235 /* calculate relative jump to board_init_r in ram */
236 move.l %a0, %a1
237 add.l #(board_init_r - CFG_MONITOR_BASE), %a1
238
239 /* set parameters for board_init_r */
240 move.l %a0,-(%sp) /* dest_addr */
241 move.l %d0,-(%sp) /* gd */
242 jsr (%a1)
243
244/*------------------------------------------------------------------------------*/
245/* exception code */
246 .globl _fault
247_fault:
248 jmp _fault
249 .globl _exc_handler
250
251_exc_handler:
252 SAVE_ALL
253 movel %sp,%sp@-
254 bsr exc_handler
255 addql #4,%sp
256 RESTORE_ALL
257
258 .globl _int_handler
259_int_handler:
260 SAVE_ALL
261 movel %sp,%sp@-
262 bsr int_handler
263 addql #4,%sp
264 RESTORE_ALL
265
266/*------------------------------------------------------------------------------*/
267/* cache functions */
268 .globl icache_enable
269icache_enable:
270 move.l #0x01000000, %d0 /* Invalidate cache cmd */
271 movec %d0, %CACR /* Invalidate cache */
272 move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
273 movec %d0, %ACR0 /* Enable cache */
274 move.l #(CFG_CS0_BASE + 0xc000), %d0 /* Setup cache mask */
275 movec %d0, %ACR1 /* Enable cache */
276
277 /*move.l #0x81000100, %d0*/ /* Setup cache mask */
278 move.l #0x81000100, %d0 /* Setup cache mask */
279 movec %d0, %CACR /* Enable cache */
280
281 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
282 moveq #1, %d0
283 move.l %d0, (%a1)
284 rts
285
286 .globl icache_disable
287icache_disable:
288 move.l #0x00000100, %d0 /* Setup cache mask */
289 movec %d0, %CACR /* Enable cache */
290 clr.l %d0 /* Setup cache mask */
291 movec %d0, %ACR0 /* Enable cache */
292 movec %d0, %ACR1 /* Enable cache */
293
294 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
295 moveq #0, %d0
296 move.l %d0, (%a1)
297 rts
298
299 .globl icache_status
300icache_status:
301 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
302 move.l (%a1), %d0
303 rts
304
305 .globl icache_invalid
306icache_invalid:
307 move.l #0x00000100, %d0 /* Setup cache mask */
308 movec %d0, %CACR /* Enable cache */
309 rts
310
311 .globl dcache_enable
312dcache_enable:
313 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
314 moveq #1, %d0
315 move.l %d0, (%a1)
316 rts
317
318 /* No dcache, just a dummy function */
319 .globl dcache_disable
320dcache_disable:
321 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
322 moveq #0, %d0
323 move.l %d0, (%a1)
324 rts
325
326 .globl dcache_status
327dcache_status:
328 move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
329 move.l (%a1), %d0
330 rts
331
332/*------------------------------------------------------------------------------*/
333
334 .globl version_string
335version_string:
336 .ascii U_BOOT_VERSION
337 .ascii " (", __DATE__, " - ", __TIME__, ")"
338 .ascii CONFIG_IDENT_STRING, "\0"