Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | /dts-v1/; |
| 8 | |
Bin Meng | ef37e7b | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 9 | #include <dt-bindings/interrupt-router/intel-irq.h> |
| 10 | |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 11 | /include/ "skeleton.dtsi" |
| 12 | /include/ "serial.dtsi" |
Bin Meng | 7ca7374 | 2015-11-12 05:33:06 -0800 | [diff] [blame] | 13 | /include/ "keyboard.dtsi" |
Bin Meng | 770fd33 | 2015-07-15 16:23:39 +0800 | [diff] [blame] | 14 | /include/ "rtc.dtsi" |
Bin Meng | 38de020 | 2015-11-13 00:11:22 -0800 | [diff] [blame] | 15 | /include/ "tsc_timer.dtsi" |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 16 | |
| 17 | / { |
Bin Meng | 000883b | 2015-06-03 09:20:04 +0800 | [diff] [blame] | 18 | model = "QEMU x86 (I440FX)"; |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 19 | compatible = "qemu,x86"; |
| 20 | |
| 21 | config { |
| 22 | silent_console = <0>; |
| 23 | }; |
| 24 | |
| 25 | chosen { |
| 26 | stdout-path = "/serial"; |
| 27 | }; |
| 28 | |
Bin Meng | 354dcdd | 2015-07-22 01:21:13 -0700 | [diff] [blame] | 29 | cpus { |
| 30 | #address-cells = <1>; |
| 31 | #size-cells = <0>; |
| 32 | |
| 33 | cpu@0 { |
| 34 | device_type = "cpu"; |
Miao Yan | 4336af6 | 2016-01-07 01:32:01 -0800 | [diff] [blame] | 35 | compatible = "cpu-qemu"; |
Bin Meng | 354dcdd | 2015-07-22 01:21:13 -0700 | [diff] [blame] | 36 | reg = <0>; |
| 37 | intel,apic-id = <0>; |
| 38 | }; |
| 39 | }; |
| 40 | |
Bin Meng | 38de020 | 2015-11-13 00:11:22 -0800 | [diff] [blame] | 41 | tsc-timer { |
| 42 | clock-frequency = <1000000000>; |
| 43 | }; |
| 44 | |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 45 | pci { |
| 46 | compatible = "pci-x86"; |
| 47 | #address-cells = <3>; |
| 48 | #size-cells = <2>; |
| 49 | u-boot,dm-pre-reloc; |
| 50 | ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0 0x10000000 |
| 51 | 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 |
| 52 | 0x01000000 0x0 0x2000 0x2000 0 0xe000>; |
Bin Meng | ef37e7b | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 53 | |
Simon Glass | 3276163 | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 54 | pch@1,0 { |
Bin Meng | ef37e7b | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 55 | reg = <0x00000800 0 0 0 0>; |
Simon Glass | 3276163 | 2016-01-18 20:19:21 -0700 | [diff] [blame] | 56 | compatible = "intel,pch7"; |
| 57 | |
| 58 | irq-router { |
| 59 | compatible = "intel,irq-router"; |
| 60 | intel,pirq-config = "pci"; |
| 61 | intel,pirq-link = <0x60 4>; |
| 62 | intel,pirq-mask = <0x0e40>; |
| 63 | intel,pirq-routing = < |
| 64 | /* PIIX UHCI */ |
| 65 | PCI_BDF(0, 1, 2) INTD PIRQD |
| 66 | /* e1000 NIC */ |
| 67 | PCI_BDF(0, 3, 0) INTA PIRQC |
| 68 | >; |
| 69 | }; |
Bin Meng | ef37e7b | 2015-06-03 09:20:06 +0800 | [diff] [blame] | 70 | }; |
Bin Meng | 2229c4c | 2015-05-07 21:34:08 +0800 | [diff] [blame] | 71 | }; |
| 72 | |
| 73 | }; |