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wdenk47d1a6e2002-11-03 00:01:44 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/processor.h>
26#include <405gp_i2c.h>
27#include <command.h>
wdenk47d1a6e2002-11-03 00:01:44 +000028#include <rtc.h>
wdenk0893c472003-05-20 14:25:27 +000029#include <post.h>
wdenk47d1a6e2002-11-03 00:01:44 +000030#include <net.h>
31#include <malloc.h>
32
33#define L1_MEMSIZE (32*1024*1024)
34
35/* the std. DHCP stufff */
36#define DHCP_ROUTER 3
37#define DHCP_NETMASK 1
38#define DHCP_BOOTFILE 67
39#define DHCP_ROOTPATH 17
40#define DHCP_HOSTNAME 12
41
42/* some extras used by CRAY
43 *
44 * on the server this looks like:
45 *
46 * option L1-initrd-image code 224 = string;
47 * option L1-initrd-image "/opt/craysv2/craymcu/l1/flash/initrd.image"
48 */
49#define DHCP_L1_INITRD 224
50
51/* new, [better?] way via official vendor-extensions, defining an option
52 * space.
53 * on the server this looks like:
54 *
wdenk0893c472003-05-20 14:25:27 +000055 * option space CRAYL1;
56 * option CRAYL1.initrd code 3 = string;
57 * ..etc...
wdenk47d1a6e2002-11-03 00:01:44 +000058 */
59#define DHCP_VENDOR_SPECX 43
60#define DHCP_VX_INITRD 3
61#define DHCP_VX_BOOTCMD 4
wdenk0893c472003-05-20 14:25:27 +000062#define DHCP_VX_BOOTARGS 5
wdenk47d1a6e2002-11-03 00:01:44 +000063#define DHCP_VX_ROOTDEV 6
wdenk0893c472003-05-20 14:25:27 +000064#define DHCP_VX_FROMFLASH 7
65#define DHCP_VX_BOOTSCRIPT 8
66#define DHCP_VX_RCFILE 9
67#define DHCP_VX_MAGIC 10
wdenk47d1a6e2002-11-03 00:01:44 +000068
69/* Things DHCP server can tellme about. If there's no flash address, then
70 * they dont participate in 'update' to flash, and we force their values
71 * back to '0' every boot to be sure to get them fresh from DHCP. Yes, I
72 * know this is a pain...
73 *
74 * If I get no bootfile, boot from flash. If rootpath, use that. If no
75 * rootpath use initrd in flash.
76 */
77typedef struct dhcp_item_s {
78 u8 dhcp_option;
79 u8 dhcp_vendor_option;
80 char *dhcpvalue;
81 char *envname;
82} dhcp_item_t;
83static dhcp_item_t Things[] = {
84 {DHCP_ROUTER, 0, NULL, "gateway"},
85 {DHCP_NETMASK, 0, NULL, "netmask"},
86 {DHCP_BOOTFILE, 0, NULL, "bootfile"},
87 {DHCP_ROOTPATH, 0, NULL, "rootpath"},
88 {DHCP_HOSTNAME, 0, NULL, "hostname"},
89 {DHCP_L1_INITRD, 0, NULL, "initrd"},
90/* and the other way.. */
91 {DHCP_VENDOR_SPECX, DHCP_VX_INITRD, NULL, "initrd"},
92 {DHCP_VENDOR_SPECX, DHCP_VX_BOOTCMD, NULL, "bootcmd"},
wdenk0893c472003-05-20 14:25:27 +000093 {DHCP_VENDOR_SPECX, DHCP_VX_FROMFLASH, NULL, "fromflash"},
94 {DHCP_VENDOR_SPECX, DHCP_VX_BOOTSCRIPT, NULL, "bootscript"},
95 {DHCP_VENDOR_SPECX, DHCP_VX_RCFILE, NULL, "rcfile"},
96 {DHCP_VENDOR_SPECX, DHCP_VX_BOOTARGS, NULL, "xbootargs"},
wdenk47d1a6e2002-11-03 00:01:44 +000097 {DHCP_VENDOR_SPECX, DHCP_VX_ROOTDEV, NULL, NULL},
wdenk0893c472003-05-20 14:25:27 +000098 {DHCP_VENDOR_SPECX, DHCP_VX_MAGIC, NULL, NULL}
wdenk47d1a6e2002-11-03 00:01:44 +000099};
100
101#define N_THINGS ((sizeof(Things))/(sizeof(dhcp_item_t)))
102
wdenk0893c472003-05-20 14:25:27 +0000103extern char bootscript[];
104
105/* Here is the boot logic as HUSH script. Overridden by any TFP provided
106 * bootscript file.
107 */
108
109static void init_sdram (void);
wdenk47d1a6e2002-11-03 00:01:44 +0000110
111/* ------------------------------------------------------------------------- */
wdenkda55c6e2004-01-20 23:12:12 +0000112int board_early_init_f (void)
wdenk47d1a6e2002-11-03 00:01:44 +0000113{
wdenk0893c472003-05-20 14:25:27 +0000114 /* Running from ROM: global data is still READONLY */
115 init_sdram ();
wdenk47d1a6e2002-11-03 00:01:44 +0000116 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
117 mtdcr (uicer, 0x00000000); /* disable all ints */
118 mtdcr (uiccr, 0x00000020); /* set all but FPGA SMI to be non-critical */
119 mtdcr (uicpr, 0xFFFFFFE0); /* set int polarities */
120 mtdcr (uictr, 0x10000000); /* set int trigger levels */
121 mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
122 mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
123 return 0;
124}
125
126/* ------------------------------------------------------------------------- */
127int checkboard (void)
128{
129 return (0);
130}
wdenk0893c472003-05-20 14:25:27 +0000131/* ------------------------------------------------------------------------- */
wdenk47d1a6e2002-11-03 00:01:44 +0000132
133/* ------------------------------------------------------------------------- */
134int misc_init_r (void)
135{
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200136 char *s, *e;
wdenk47d1a6e2002-11-03 00:01:44 +0000137 image_header_t *hdr;
138 time_t timestamp;
139 struct rtc_time tm;
wdenk0893c472003-05-20 14:25:27 +0000140 char bootcmd[32];
wdenk47d1a6e2002-11-03 00:01:44 +0000141
142 hdr = (image_header_t *) (CFG_MONITOR_BASE - sizeof (image_header_t));
143 timestamp = (time_t) hdr->ih_time;
144 to_tm (timestamp, &tm);
145 printf ("Welcome to U-Boot on Cray L1. Compiled %4d-%02d-%02d %2d:%02d:%02d (UTC)\n", tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec);
146
147#define FACTORY_SETTINGS 0xFFFC0000
148 if ((s = getenv ("ethaddr")) == NULL) {
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200149 e = (char *) (FACTORY_SETTINGS);
wdenk47d1a6e2002-11-03 00:01:44 +0000150 if (*(e + 0) != '0'
151 || *(e + 1) != '0'
152 || *(e + 2) != ':'
153 || *(e + 3) != '4' || *(e + 4) != '0' || *(e + 17) != '\0') {
154 printf ("No valid MAC address in flash location 0x3C0000!\n");
155 } else {
156 printf ("Factory MAC: %s\n", e);
157 setenv ("ethaddr", e);
158 }
159 }
wdenk0893c472003-05-20 14:25:27 +0000160 sprintf (bootcmd,"autoscript %X",(unsigned)bootscript);
161 setenv ("bootcmd", bootcmd);
wdenk47d1a6e2002-11-03 00:01:44 +0000162 return (0);
163}
164
165/* ------------------------------------------------------------------------- */
166long int initdram (int board_type)
167{
168 return (L1_MEMSIZE);
169}
170
171/* ------------------------------------------------------------------------- */
172/* stubs so we can print dates w/o any nvram RTC.*/
173void rtc_get (struct rtc_time *tmp)
174{
175 return;
176}
177void rtc_set (struct rtc_time *tmp)
178{
179 return;
180}
181void rtc_reset (void)
182{
183 return;
184}
185
186/* ------------------------------------------------------------------------- */
wdenk0893c472003-05-20 14:25:27 +0000187/* Do sdram bank init in C so I can read it..no console to print to yet!
wdenk47d1a6e2002-11-03 00:01:44 +0000188 */
wdenk0893c472003-05-20 14:25:27 +0000189static void init_sdram (void)
wdenk47d1a6e2002-11-03 00:01:44 +0000190{
wdenk0893c472003-05-20 14:25:27 +0000191 unsigned long tmp;
wdenk47d1a6e2002-11-03 00:01:44 +0000192
193 /* write SDRAM bank 0 register */
194 mtdcr (memcfga, mem_mb0cf);
195 mtdcr (memcfgd, 0x00062001);
196
197/* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */
198/* To set the appropriate timings, we need to know the SDRAM speed. */
199/* We can use the PLB speed since the SDRAM speed is the same as */
200/* the PLB speed. The PLB speed is the FBK divider times the */
201/* 405GP reference clock, which on the L1 is 25Mhz. */
202/* Thus, if FBK div is 2, SDRAM is 50Mhz; if FBK div is 3, SDRAM is */
203/* 150Mhz; if FBK is 3, SDRAM is 150Mhz. */
204
205 /* divisor = ((mfdcr(strap)>> 28) & 0x3); */
206
207/* write SDRAM timing for 100Mhz. */
208 mtdcr (memcfga, mem_sdtr1);
209 mtdcr (memcfgd, 0x0086400D);
210
211/* write SDRAM refresh interval register */
212 mtdcr (memcfga, mem_rtr);
213 mtdcr (memcfgd, 0x05F00000);
214 udelay (200);
215
216/* sdram controller.*/
217 mtdcr (memcfga, mem_mcopt1);
218 mtdcr (memcfgd, 0x90800000);
219 udelay (200);
220
wdenk0893c472003-05-20 14:25:27 +0000221/* initially, disable ECC on all banks */
222 udelay (200);
wdenk47d1a6e2002-11-03 00:01:44 +0000223 mtdcr (memcfga, mem_ecccf);
224 tmp = mfdcr (memcfgd);
225 tmp &= 0xff0fffff;
226 mtdcr (memcfga, mem_ecccf);
227 mtdcr (memcfgd, tmp);
228
wdenk0893c472003-05-20 14:25:27 +0000229 return;
230}
231
232extern int memory_post_test (int flags);
233
234int testdram (void)
235{
236 unsigned long tmp;
237 uint *pstart = (uint *) 0x00000000;
238 uint *pend = (uint *) L1_MEMSIZE;
239 uint *p;
240
241 if (getenv_r("booted",NULL,0) <= 0)
242 {
243 printf ("testdram..");
244 /*AA*/
245 for (p = pstart; p < pend; p++)
246 *p = 0xaaaaaaaa;
247 for (p = pstart; p < pend; p++) {
248 if (*p != 0xaaaaaaaa) {
wdenk57b2d802003-06-27 21:31:46 +0000249 printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
wdenk0893c472003-05-20 14:25:27 +0000250 (uint) p, *p, 0xaaaaaaaa);
251 return 1;
252 }
253 }
254 /*55*/
255 for (p = pstart; p < pend; p++)
256 *p = 0x55555555;
257 for (p = pstart; p < pend; p++) {
258 if (*p != 0x55555555) {
wdenk57b2d802003-06-27 21:31:46 +0000259 printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
wdenk0893c472003-05-20 14:25:27 +0000260 (uint) p, *p, 0x55555555);
261 return 1;
262 }
263 }
264 /*addr*/
265 for (p = pstart; p < pend; p++)
266 *p = (unsigned)p;
267 for (p = pstart; p < pend; p++) {
268 if (*p != (unsigned)p) {
wdenk57b2d802003-06-27 21:31:46 +0000269 printf ("SDRAM test fails at: %08x, was %08x expected %08x\n",
wdenk0893c472003-05-20 14:25:27 +0000270 (uint) p, *p, (uint)p);
271 return 1;
272 }
273 }
274 printf ("Success. ");
275 }
276 printf ("Enable ECC..");
277
wdenk47d1a6e2002-11-03 00:01:44 +0000278 mtdcr (memcfga, mem_mcopt1);
279 tmp = (mfdcr (memcfgd) & ~0xFFE00000) | 0x90800000;
280 mtdcr (memcfga, mem_mcopt1);
281 mtdcr (memcfgd, tmp);
282 udelay (600);
wdenk0893c472003-05-20 14:25:27 +0000283 for (p = (unsigned long) 0; ((unsigned long) p < L1_MEMSIZE); *p++ = 0L)
284 ;
wdenk47d1a6e2002-11-03 00:01:44 +0000285 udelay (400);
286 mtdcr (memcfga, mem_ecccf);
287 tmp = mfdcr (memcfgd);
wdenk47d1a6e2002-11-03 00:01:44 +0000288 tmp |= 0x00800000;
289 mtdcr (memcfgd, tmp);
290 udelay (400);
wdenk0893c472003-05-20 14:25:27 +0000291 printf ("enabled.\n");
292 return (0);
wdenk47d1a6e2002-11-03 00:01:44 +0000293}
294
295/* ------------------------------------------------------------------------- */
296static u8 *dhcp_env_update (u8 thing, u8 * pop)
297{
298 u8 i, oplen;
299
300 oplen = *(pop + 1);
301
302 if ((Things[thing].dhcpvalue = malloc (oplen)) == NULL) {
303 printf ("Whoops! failed to malloc space for DHCP thing %s\n",
304 Things[thing].envname);
305 return NULL;
306 }
307 for (i = 0; (i < oplen); i++)
308 if ((*(Things[thing].dhcpvalue + i) = *(pop + 2 + i)) == ' ')
309 break;
310 *(Things[thing].dhcpvalue + i) = '\0';
311
312/* set env. */
313 if (Things[thing].envname)
wdenk0893c472003-05-20 14:25:27 +0000314 {
wdenk47d1a6e2002-11-03 00:01:44 +0000315 setenv (Things[thing].envname, Things[thing].dhcpvalue);
wdenk0893c472003-05-20 14:25:27 +0000316 }
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200317 return ((u8 *)(Things[thing].dhcpvalue));
wdenk47d1a6e2002-11-03 00:01:44 +0000318}
319
320/* ------------------------------------------------------------------------- */
321u8 *dhcp_vendorex_prep (u8 * e)
322{
323 u8 thing;
324
325/* ask for the things I want. */
326 *e++ = 55; /* Parameter Request List */
327 *e++ = N_THINGS;
328 for (thing = 0; thing < N_THINGS; thing++)
329 *e++ = Things[thing].dhcp_option;
330 *e++ = 255;
331
332 return e;
333}
334
335/* ------------------------------------------------------------------------- */
336/* .. return NULL means it wasnt mine, non-null means I got it..*/
337u8 *dhcp_vendorex_proc (u8 * pop)
338{
339 u8 oplen, *sub_op, sub_oplen, *retval;
340 u8 thing = 0;
341
342 retval = NULL;
343 oplen = *(pop + 1);
344/* if pop is vender spec indicator, there are sub-options. */
345 if (*pop == DHCP_VENDOR_SPECX) {
346 for (sub_op = pop + 2;
347 oplen && (sub_oplen = *(sub_op + 1));
348 oplen -= sub_oplen, sub_op += (sub_oplen + 2)) {
349 for (thing = 0; thing < N_THINGS; thing++) {
350 if (*sub_op == Things[thing].dhcp_vendor_option) {
wdenk0893c472003-05-20 14:25:27 +0000351 if (!(retval = dhcp_env_update (thing, sub_op))) {
352 return NULL;
353 }
wdenk47d1a6e2002-11-03 00:01:44 +0000354 }
355 }
356 }
357 } else {
358 for (thing = 0; thing < N_THINGS; thing++) {
359 if (*pop == Things[thing].dhcp_option)
360 if (!(retval = dhcp_env_update (thing, pop)))
361 return NULL;
362 }
363 }
wdenk0893c472003-05-20 14:25:27 +0000364 return (pop);
wdenk47d1a6e2002-11-03 00:01:44 +0000365}