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Scott Wood095b7122012-09-20 19:02:18 -05001/*
2 * (C) Copyright 2006
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de
4 *
5 * Copyright 2009 Freescale Semiconductor, Inc.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Scott Wood095b7122012-09-20 19:02:18 -05008 */
9
Masahiro Yamadacd1b58e2014-04-28 10:17:10 +090010#include "config.h"
Scott Wood095b7122012-09-20 19:02:18 -050011
12OUTPUT_ARCH(powerpc)
Ying Zhang0d4f5442013-05-20 14:07:23 +080013#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
14PHDRS
15{
16 text PT_LOAD;
17 bss PT_LOAD;
18}
19#endif
Scott Wood095b7122012-09-20 19:02:18 -050020SECTIONS
21{
22 . = CONFIG_SPL_TEXT_BASE;
23 .text : {
24 *(.text*)
25 }
26 _etext = .;
27
28 .reloc : {
29 _GOT2_TABLE_ = .;
30 KEEP(*(.got2))
31 KEEP(*(.got))
32 PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4);
33 _FIXUP_TABLE_ = .;
34 KEEP(*(.fixup))
35 }
36 __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1;
37 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
38
39 . = ALIGN(8);
40 .data : {
41 *(.rodata*)
42 *(.data*)
43 *(.sdata*)
44 }
45 _edata = .;
46
Ying Zhang4393f952013-09-04 17:03:45 +080047 . = ALIGN(4);
48 .u_boot_list : {
49 KEEP(*(SORT(.u_boot_list*)));
50 }
51
Ying Zhang9ff70262013-08-16 15:16:11 +080052 . = .;
53 __start___ex_table = .;
54 __ex_table : { *(__ex_table) }
55 __stop___ex_table = .;
56
Scott Wood095b7122012-09-20 19:02:18 -050057 . = ALIGN(8);
58 __init_begin = .;
59 __init_end = .;
Prabhakar Kushwaha6e2b9a32014-04-08 19:12:31 +053060#ifdef CONFIG_SPL_SKIP_RELOCATE
61 . = ALIGN(4);
62 __bss_start = .;
63 .bss : {
64 *(.sbss*)
65 *(.bss*)
66 }
67 . = ALIGN(4);
68 __bss_end = .;
69#endif
Po Liuf6facca2014-01-10 10:10:58 +080070
71/* For ifc, elbc, esdhc, espi, all need the SPL without section .resetvec */
72#ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC
73 .bootpg ADDR(.text) - 0x1000 :
74 {
75 KEEP(*(.bootpg))
76 } :text = 0xffff
77#else
Scott Wood095b7122012-09-20 19:02:18 -050078#if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */
Prabhakar Kushwahaa7eb72b2014-04-08 19:12:19 +053079#ifndef BOOT_PAGE_OFFSET
80#define BOOT_PAGE_OFFSET 0x1000
81#endif
82 .bootpg ADDR(.text) + BOOT_PAGE_OFFSET :
Scott Wood095b7122012-09-20 19:02:18 -050083 {
Prabhakar Kushwahaab4ab012013-04-16 13:27:59 +053084 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
Scott Wood095b7122012-09-20 19:02:18 -050085 }
Prabhakar Kushwahaa7eb72b2014-04-08 19:12:19 +053086#ifndef RESET_VECTOR_OFFSET
Scott Wood095b7122012-09-20 19:02:18 -050087#define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */
Prabhakar Kushwahaa7eb72b2014-04-08 19:12:19 +053088#endif
Scott Wood095b7122012-09-20 19:02:18 -050089#elif defined(CONFIG_FSL_ELBC)
90#define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */
91#else
92#error unknown NAND controller
93#endif
94 .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : {
95 KEEP(*(.resetvec))
96 } = 0xffff
Ying Zhang0d4f5442013-05-20 14:07:23 +080097#endif
Scott Wood095b7122012-09-20 19:02:18 -050098
Prabhakar Kushwaha6e2b9a32014-04-08 19:12:31 +053099#ifndef CONFIG_SPL_SKIP_RELOCATE
Scott Wood095b7122012-09-20 19:02:18 -0500100 /*
101 * Make sure that the bss segment isn't linked at 0x0, otherwise its
102 * address won't be updated during relocation fixups.
103 */
104 . |= 0x10;
105
Ying Zhang5ca62f22013-06-07 17:25:16 +0800106 . = ALIGN(4);
Scott Wood095b7122012-09-20 19:02:18 -0500107 __bss_start = .;
108 .bss : {
109 *(.sbss*)
110 *(.bss*)
111 }
Ying Zhang5ca62f22013-06-07 17:25:16 +0800112 . = ALIGN(4);
Simon Glassed70c8f2013-03-14 06:54:53 +0000113 __bss_end = .;
Prabhakar Kushwaha6e2b9a32014-04-08 19:12:31 +0530114#endif
Scott Wood095b7122012-09-20 19:02:18 -0500115}