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Tom Warren23d7fe92012-12-11 13:34:18 +00001/*
Tom Warren7110b952013-03-06 16:16:22 -07002 * (C) Copyright 2010-2013
Tom Warren23d7fe92012-12-11 13:34:18 +00003 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <asm/arch/pinmux.h>
Tom Warren7110b952013-03-06 16:16:22 -070026#include <asm/arch/gp_padctrl.h>
Tom Warren23d7fe92012-12-11 13:34:18 +000027#include "pinmux-config-cardhu.h"
Tom Warrenf5d874d2013-02-26 12:26:55 -070028#include <i2c.h>
29
30#define PMU_I2C_ADDRESS 0x2D
31#define MAX_I2C_RETRY 3
Tom Warren23d7fe92012-12-11 13:34:18 +000032
33/*
34 * Routine: pinmux_init
35 * Description: Do individual peripheral pinmux configs
36 */
37void pinmux_init(void)
38{
39 pinmux_config_table(tegra3_pinmux_common,
40 ARRAY_SIZE(tegra3_pinmux_common));
41
42 pinmux_config_table(unused_pins_lowpower,
43 ARRAY_SIZE(unused_pins_lowpower));
Tom Warren7110b952013-03-06 16:16:22 -070044
45 /* Initialize any non-default pad configs (APB_MISC_GP regs) */
46 padgrp_config_table(cardhu_padctrl, ARRAY_SIZE(cardhu_padctrl));
Tom Warren23d7fe92012-12-11 13:34:18 +000047}
Tom Warrenf5d874d2013-02-26 12:26:55 -070048
49#if defined(CONFIG_TEGRA_MMC)
50/*
51 * Do I2C/PMU writes to bring up SD card bus power
52 *
53 */
54void board_sdmmc_voltage_init(void)
55{
56 uchar reg, data_buffer[1];
57 int i;
58
59 i2c_set_bus_num(0); /* PMU is on bus 0 */
60
61 /* TPS659110: LDO5_REG = 3.3v, ACTIVE to SDMMC1 */
62 data_buffer[0] = 0x65;
63 reg = 0x32;
64
65 for (i = 0; i < MAX_I2C_RETRY; ++i) {
66 if (i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1))
67 udelay(100);
68 }
69
70 /* TPS659110: GPIO7_REG = PDEN, output a 1 to EN_3V3_SYS */
71 data_buffer[0] = 0x09;
72 reg = 0x67;
73
74 for (i = 0; i < MAX_I2C_RETRY; ++i) {
75 if (i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1))
76 udelay(100);
77 }
78}
79
80/*
81 * Routine: pin_mux_mmc
82 * Description: setup the MMC muxes, power rails, etc.
83 */
84void pin_mux_mmc(void)
85{
86 /*
87 * NOTE: We don't do mmc-specific pin muxes here.
88 * They were done globally in pinmux_init().
89 */
90
91 /* Bring up the SDIO1 power rail */
92 board_sdmmc_voltage_init();
93}
94#endif /* MMC */