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git01.mediatek.com / filogic / uboot / f5c331e4d5f8394023f4856874206fb7e84542e4 / . / configs / meesc_dataflash_defconfig
blob: 54adab920373f8d79b0c675e1dcf3802db98bf6a [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1CONFIG_ARM=y
Masahiro Yamadaaf908ee2015-02-20 17:04:01 +0900[diff] [blame]2CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x21F00000
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]4CONFIG_TARGET_MEESC=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rinif2260382018-08-16 08:16:24 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]7CONFIG_FIT=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]8CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9263,SYS_USE_DATAFLASH"
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]9CONFIG_BOOTDELAY=3
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]10CONFIG_MISC_INIT_R=y
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]11CONFIG_BOARD_EARLY_INIT_F=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]12CONFIG_HUSH_PARSER=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]13# CONFIG_CMD_BDI is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]14CONFIG_CMD_BOOTZ=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]15# CONFIG_CMD_LOADS is not set
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]16CONFIG_CMD_SF=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]17# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]18CONFIG_CMD_DHCP=y
19CONFIG_CMD_PING=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]20CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]21CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]22CONFIG_ENV_IS_IN_SPI_FLASH=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]23CONFIG_DM=y
24CONFIG_CLK=y
25CONFIG_CLK_AT91=y
26CONFIG_DM_GPIO=y
27CONFIG_AT91_GPIO=y
28# CONFIG_MMC is not set
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]29CONFIG_DM_SPI_FLASH=y
30CONFIG_SPI_FLASH=y
31CONFIG_SPI_FLASH_ATMEL=y
32CONFIG_SPI_FLASH_DATAFLASH=y
33CONFIG_PINCTRL=y
34CONFIG_PINCTRL_AT91=y
35CONFIG_DM_SERIAL=y
36CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]37CONFIG_SPI=y
Wenyou.Yang@microchip.comcc2eca02017-07-21 17:06:40 +0800[diff] [blame]38CONFIG_DM_SPI=y