blob: 391327472087afd7ea2530e4bb24c1cdaec076fb [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Sergey Kubushyne8f39122007-08-10 20:26:18 +02002/*
3 * TI DaVinci (TMS320DM644x) I2C driver.
4 *
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -04005 * (C) Copyright 2012-2014
6 * Texas Instruments Incorporated, <www.ti.com>
7 * (C) Copyright 2007 Sergey Kubushyn <ksi@koi8.net>
Sergey Kubushyne8f39122007-08-10 20:26:18 +02008 * --------------------------------------------------------
9 *
Simon Glasscb052ff2016-11-23 06:34:44 -070010 * NOTE: This driver should be converted to driver model before June 2017.
Heinrich Schuchardtc79f03c2020-02-25 21:35:39 +010011 * Please see doc/driver-model/i2c-howto.rst for instructions.
Sergey Kubushyne8f39122007-08-10 20:26:18 +020012 */
13
Tom Rinif57e3242024-05-01 19:30:52 -060014#include <config.h>
Sergey Kubushyne8f39122007-08-10 20:26:18 +020015#include <i2c.h>
Cooper Jr., Frankline9d85272017-04-20 10:25:43 -050016#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -060017#include <log.h>
Sergey Kubushyne8f39122007-08-10 20:26:18 +020018#include <asm/arch/hardware.h>
19#include <asm/arch/i2c_defs.h>
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040020#include <asm/io.h>
Simon Glassdbd79542020-05-10 11:40:11 -060021#include <linux/delay.h>
Karicheri, Muralidharanf89c87f2014-04-04 13:16:51 -040022#include "davinci_i2c.h"
Sergey Kubushyne8f39122007-08-10 20:26:18 +020023
Cooper Jr., Frankline9d85272017-04-20 10:25:43 -050024/* Information about i2c controller */
25struct i2c_bus {
26 int id;
27 uint speed;
28 struct i2c_regs *regs;
29};
Cooper Jr., Frankline9d85272017-04-20 10:25:43 -050030
Sergey Kubushyne8f39122007-08-10 20:26:18 +020031#define CHECK_NACK() \
32 do {\
33 if (tmp & (I2C_TIMEOUT | I2C_STAT_NACK)) {\
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040034 REG(&(i2c_base->i2c_con)) = 0;\
35 return 1;\
36 } \
Sergey Kubushyne8f39122007-08-10 20:26:18 +020037 } while (0)
38
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -050039static int _wait_for_bus(struct i2c_regs *i2c_base)
Sergey Kubushyne8f39122007-08-10 20:26:18 +020040{
41 int stat, timeout;
42
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040043 REG(&(i2c_base->i2c_stat)) = 0xffff;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020044
45 for (timeout = 0; timeout < 10; timeout++) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040046 stat = REG(&(i2c_base->i2c_stat));
47 if (!((stat) & I2C_STAT_BB)) {
48 REG(&(i2c_base->i2c_stat)) = 0xffff;
49 return 0;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020050 }
51
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040052 REG(&(i2c_base->i2c_stat)) = stat;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020053 udelay(50000);
54 }
55
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040056 REG(&(i2c_base->i2c_stat)) = 0xffff;
57 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020058}
59
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -050060static int _poll_i2c_irq(struct i2c_regs *i2c_base, int mask)
Sergey Kubushyne8f39122007-08-10 20:26:18 +020061{
62 int stat, timeout;
63
64 for (timeout = 0; timeout < 10; timeout++) {
65 udelay(1000);
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040066 stat = REG(&(i2c_base->i2c_stat));
67 if (stat & mask)
68 return stat;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020069 }
70
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040071 REG(&(i2c_base->i2c_stat)) = 0xffff;
72 return stat | I2C_TIMEOUT;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020073}
74
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -050075static void _flush_rx(struct i2c_regs *i2c_base)
Sergey Kubushyne8f39122007-08-10 20:26:18 +020076{
Sergey Kubushyne8f39122007-08-10 20:26:18 +020077 while (1) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040078 if (!(REG(&(i2c_base->i2c_stat)) & I2C_STAT_RRDY))
Sergey Kubushyne8f39122007-08-10 20:26:18 +020079 break;
80
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040081 REG(&(i2c_base->i2c_drr));
82 REG(&(i2c_base->i2c_stat)) = I2C_STAT_RRDY;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020083 udelay(1000);
84 }
85}
86
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -050087static uint _davinci_i2c_setspeed(struct i2c_regs *i2c_base,
88 uint speed)
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040089{
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040090 uint32_t div, psc;
Sergey Kubushyne8f39122007-08-10 20:26:18 +020091
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040092 psc = 2;
93 /* SCLL + SCLH */
Tom Rini6a5dccc2022-11-16 13:10:41 -050094 div = (CFG_SYS_HZ_CLOCK / ((psc + 1) * speed)) - 10;
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040095 REG(&(i2c_base->i2c_psc)) = psc; /* 27MHz / (2 + 1) = 9MHz */
96 REG(&(i2c_base->i2c_scll)) = (div * 50) / 100; /* 50% Duty */
97 REG(&(i2c_base->i2c_sclh)) = div - REG(&(i2c_base->i2c_scll));
98
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -040099 return 0;
100}
101
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500102static void _davinci_i2c_init(struct i2c_regs *i2c_base,
103 uint speed, int slaveadd)
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200104{
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400105 if (REG(&(i2c_base->i2c_con)) & I2C_CON_EN) {
106 REG(&(i2c_base->i2c_con)) = 0;
107 udelay(50000);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200108 }
109
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500110 _davinci_i2c_setspeed(i2c_base, speed);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200111
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400112 REG(&(i2c_base->i2c_oa)) = slaveadd;
113 REG(&(i2c_base->i2c_cnt)) = 0;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200114
115 /* Interrupts must be enabled or I2C module won't work */
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400116 REG(&(i2c_base->i2c_ie)) = I2C_IE_SCD_IE | I2C_IE_XRDY_IE |
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200117 I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | I2C_IE_NACK_IE;
118
119 /* Now enable I2C controller (get it out of reset) */
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400120 REG(&(i2c_base->i2c_con)) = I2C_CON_EN;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200121
122 udelay(1000);
123}
124
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500125static int _davinci_i2c_read(struct i2c_regs *i2c_base, uint8_t chip,
126 uint32_t addr, int alen, uint8_t *buf, int len)
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200127{
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400128 uint32_t tmp;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200129 int i;
130
131 if ((alen < 0) || (alen > 2)) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400132 printf("%s(): bogus address length %x\n", __func__, alen);
133 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200134 }
135
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500136 if (_wait_for_bus(i2c_base))
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400137 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200138
139 if (alen != 0) {
140 /* Start address phase */
141 tmp = I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX;
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400142 REG(&(i2c_base->i2c_cnt)) = alen;
143 REG(&(i2c_base->i2c_sa)) = chip;
144 REG(&(i2c_base->i2c_con)) = tmp;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200145
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500146 tmp = _poll_i2c_irq(i2c_base, I2C_STAT_XRDY | I2C_STAT_NACK);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200147
148 CHECK_NACK();
149
150 switch (alen) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400151 case 2:
152 /* Send address MSByte */
153 if (tmp & I2C_STAT_XRDY) {
154 REG(&(i2c_base->i2c_dxr)) = (addr >> 8) & 0xff;
155 } else {
156 REG(&(i2c_base->i2c_con)) = 0;
157 return 1;
158 }
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200159
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500160 tmp = _poll_i2c_irq(i2c_base,
161 I2C_STAT_XRDY | I2C_STAT_NACK);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200162
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400163 CHECK_NACK();
164 /* No break, fall through */
165 case 1:
166 /* Send address LSByte */
167 if (tmp & I2C_STAT_XRDY) {
168 REG(&(i2c_base->i2c_dxr)) = addr & 0xff;
169 } else {
170 REG(&(i2c_base->i2c_con)) = 0;
171 return 1;
172 }
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200173
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500174 tmp = _poll_i2c_irq(i2c_base, I2C_STAT_XRDY |
175 I2C_STAT_NACK | I2C_STAT_ARDY);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200176
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400177 CHECK_NACK();
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200178
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400179 if (!(tmp & I2C_STAT_ARDY)) {
180 REG(&(i2c_base->i2c_con)) = 0;
181 return 1;
182 }
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200183 }
184 }
185
186 /* Address phase is over, now read 'len' bytes and stop */
187 tmp = I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP;
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400188 REG(&(i2c_base->i2c_cnt)) = len & 0xffff;
189 REG(&(i2c_base->i2c_sa)) = chip;
190 REG(&(i2c_base->i2c_con)) = tmp;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200191
192 for (i = 0; i < len; i++) {
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500193 tmp = _poll_i2c_irq(i2c_base, I2C_STAT_RRDY | I2C_STAT_NACK |
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400194 I2C_STAT_ROVR);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200195
196 CHECK_NACK();
197
198 if (tmp & I2C_STAT_RRDY) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400199 buf[i] = REG(&(i2c_base->i2c_drr));
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200200 } else {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400201 REG(&(i2c_base->i2c_con)) = 0;
202 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200203 }
204 }
205
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500206 tmp = _poll_i2c_irq(i2c_base, I2C_STAT_SCD | I2C_STAT_NACK);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200207
208 CHECK_NACK();
209
210 if (!(tmp & I2C_STAT_SCD)) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400211 REG(&(i2c_base->i2c_con)) = 0;
212 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200213 }
214
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500215 _flush_rx(i2c_base);
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400216 REG(&(i2c_base->i2c_stat)) = 0xffff;
217 REG(&(i2c_base->i2c_cnt)) = 0;
218 REG(&(i2c_base->i2c_con)) = 0;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200219
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400220 return 0;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200221}
222
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500223static int _davinci_i2c_write(struct i2c_regs *i2c_base, uint8_t chip,
224 uint32_t addr, int alen, uint8_t *buf, int len)
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200225{
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400226 uint32_t tmp;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200227 int i;
228
229 if ((alen < 0) || (alen > 2)) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400230 printf("%s(): bogus address length %x\n", __func__, alen);
231 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200232 }
233 if (len < 0) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400234 printf("%s(): bogus length %x\n", __func__, len);
235 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200236 }
237
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500238 if (_wait_for_bus(i2c_base))
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400239 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200240
241 /* Start address phase */
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400242 tmp = I2C_CON_EN | I2C_CON_MST | I2C_CON_STT |
243 I2C_CON_TRX | I2C_CON_STP;
244 REG(&(i2c_base->i2c_cnt)) = (alen == 0) ?
245 len & 0xffff : (len & 0xffff) + alen;
246 REG(&(i2c_base->i2c_sa)) = chip;
247 REG(&(i2c_base->i2c_con)) = tmp;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200248
249 switch (alen) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400250 case 2:
251 /* Send address MSByte */
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500252 tmp = _poll_i2c_irq(i2c_base, I2C_STAT_XRDY | I2C_STAT_NACK);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200253
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400254 CHECK_NACK();
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200255
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400256 if (tmp & I2C_STAT_XRDY) {
257 REG(&(i2c_base->i2c_dxr)) = (addr >> 8) & 0xff;
258 } else {
259 REG(&(i2c_base->i2c_con)) = 0;
260 return 1;
261 }
262 /* No break, fall through */
263 case 1:
264 /* Send address LSByte */
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500265 tmp = _poll_i2c_irq(i2c_base, I2C_STAT_XRDY | I2C_STAT_NACK);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200266
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400267 CHECK_NACK();
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200268
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400269 if (tmp & I2C_STAT_XRDY) {
270 REG(&(i2c_base->i2c_dxr)) = addr & 0xff;
271 } else {
272 REG(&(i2c_base->i2c_con)) = 0;
273 return 1;
274 }
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200275 }
276
277 for (i = 0; i < len; i++) {
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500278 tmp = _poll_i2c_irq(i2c_base, I2C_STAT_XRDY | I2C_STAT_NACK);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200279
280 CHECK_NACK();
281
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400282 if (tmp & I2C_STAT_XRDY)
283 REG(&(i2c_base->i2c_dxr)) = buf[i];
284 else
285 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200286 }
287
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500288 tmp = _poll_i2c_irq(i2c_base, I2C_STAT_SCD | I2C_STAT_NACK);
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200289
290 CHECK_NACK();
291
292 if (!(tmp & I2C_STAT_SCD)) {
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400293 REG(&(i2c_base->i2c_con)) = 0;
294 return 1;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200295 }
296
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500297 _flush_rx(i2c_base);
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400298 REG(&(i2c_base->i2c_stat)) = 0xffff;
299 REG(&(i2c_base->i2c_cnt)) = 0;
300 REG(&(i2c_base->i2c_con)) = 0;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200301
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400302 return 0;
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200303}
Vitaly Andrianovbc9cd952014-04-04 13:16:52 -0400304
Cooper Jr., Frankline1f7f6d2017-04-20 10:25:42 -0500305static int _davinci_i2c_probe_chip(struct i2c_regs *i2c_base, uint8_t chip)
306{
307 int rc = 1;
308
309 if (chip == REG(&(i2c_base->i2c_oa)))
310 return rc;
311
312 REG(&(i2c_base->i2c_con)) = 0;
313 if (_wait_for_bus(i2c_base))
314 return 1;
315
316 /* try to read one byte from current (or only) address */
317 REG(&(i2c_base->i2c_cnt)) = 1;
318 REG(&(i2c_base->i2c_sa)) = chip;
319 REG(&(i2c_base->i2c_con)) = (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT |
320 I2C_CON_STP);
321 udelay(50000);
322
323 if (!(REG(&(i2c_base->i2c_stat)) & I2C_STAT_NACK)) {
324 rc = 0;
325 _flush_rx(i2c_base);
326 REG(&(i2c_base->i2c_stat)) = 0xffff;
327 } else {
328 REG(&(i2c_base->i2c_stat)) = 0xffff;
329 REG(&(i2c_base->i2c_con)) |= I2C_CON_STP;
330 udelay(20000);
331 if (_wait_for_bus(i2c_base))
332 return 1;
333 }
334
335 _flush_rx(i2c_base);
336 REG(&(i2c_base->i2c_stat)) = 0xffff;
337 REG(&(i2c_base->i2c_cnt)) = 0;
338 return rc;
339}
340
Cooper Jr., Frankline9d85272017-04-20 10:25:43 -0500341static int davinci_i2c_xfer(struct udevice *bus, struct i2c_msg *msg,
342 int nmsgs)
343{
344 struct i2c_bus *i2c_bus = dev_get_priv(bus);
345 int ret;
346
347 debug("i2c_xfer: %d messages\n", nmsgs);
348 for (; nmsgs > 0; nmsgs--, msg++) {
349 debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len);
350 if (msg->flags & I2C_M_RD) {
351 ret = _davinci_i2c_read(i2c_bus->regs, msg->addr,
352 0, 0, msg->buf, msg->len);
353 } else {
354 ret = _davinci_i2c_write(i2c_bus->regs, msg->addr,
355 0, 0, msg->buf, msg->len);
356 }
357 if (ret) {
358 debug("i2c_write: error sending\n");
359 return -EREMOTEIO;
360 }
361 }
362
363 return ret;
364}
365
366static int davinci_i2c_set_speed(struct udevice *dev, uint speed)
367{
368 struct i2c_bus *i2c_bus = dev_get_priv(dev);
369
370 i2c_bus->speed = speed;
371 return _davinci_i2c_setspeed(i2c_bus->regs, speed);
372}
373
374static int davinci_i2c_probe(struct udevice *dev)
375{
376 struct i2c_bus *i2c_bus = dev_get_priv(dev);
377
Simon Glass75e534b2020-12-16 21:20:07 -0700378 i2c_bus->id = dev_seq(dev);
Masahiro Yamada1096ae12020-07-17 14:36:46 +0900379 i2c_bus->regs = dev_read_addr_ptr(dev);
Cooper Jr., Frankline9d85272017-04-20 10:25:43 -0500380
381 i2c_bus->speed = 100000;
382 _davinci_i2c_init(i2c_bus->regs, i2c_bus->speed, 0);
383
384 return 0;
385}
386
387static int davinci_i2c_probe_chip(struct udevice *bus, uint chip_addr,
388 uint chip_flags)
389{
390 struct i2c_bus *i2c_bus = dev_get_priv(bus);
391
392 return _davinci_i2c_probe_chip(i2c_bus->regs, chip_addr);
393}
394
395static const struct dm_i2c_ops davinci_i2c_ops = {
396 .xfer = davinci_i2c_xfer,
397 .probe_chip = davinci_i2c_probe_chip,
398 .set_bus_speed = davinci_i2c_set_speed,
399};
400
401static const struct udevice_id davinci_i2c_ids[] = {
402 { .compatible = "ti,davinci-i2c"},
403 { .compatible = "ti,keystone-i2c"},
404 { }
405};
406
407U_BOOT_DRIVER(i2c_davinci) = {
408 .name = "i2c_davinci",
409 .id = UCLASS_I2C,
410 .of_match = davinci_i2c_ids,
411 .probe = davinci_i2c_probe,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700412 .priv_auto = sizeof(struct i2c_bus),
Cooper Jr., Frankline9d85272017-04-20 10:25:43 -0500413 .ops = &davinci_i2c_ops,
414};