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trem0053e3c2013-09-10 22:08:39 +02001/*
2 *
3 * Configuration settings for the Armadeus Project motherboard APF27
4 *
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
trem0053e3c2013-09-10 22:08:39 +020013#define CONFIG_ENV_VERSION 10
trem0053e3c2013-09-10 22:08:39 +020014#define CONFIG_BOARD_NAME apf27
15
16/*
17 * SoC configurations
18 */
Masahiro Yamada4fb5d072014-11-06 14:59:36 +090019#define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
trem0053e3c2013-09-10 22:08:39 +020020#define CONFIG_MACH_TYPE 1698 /* APF27 */
trem0053e3c2013-09-10 22:08:39 +020021
22/*
23 * Enable the call to miscellaneous platform dependent initialization.
24 */
Joe Hershberger5a9d7f12015-06-22 16:15:30 -050025#define CONFIG_SYS_NO_FLASH
trem0053e3c2013-09-10 22:08:39 +020026
27/*
28 * Board display option
29 */
30#define CONFIG_DISPLAY_BOARDINFO
31#define CONFIG_DISPLAY_CPUINFO
32
33/*
34 * SPL
35 */
trem0053e3c2013-09-10 22:08:39 +020036#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
37#define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
38#define CONFIG_SPL_MAX_SIZE 2048
39#define CONFIG_SPL_TEXT_BASE 0xA0000000
40
41/* NAND boot config */
trem0053e3c2013-09-10 22:08:39 +020042#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
43#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
44#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
45#define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
46
47/*
48 * BOOTP options
49 */
50#define CONFIG_BOOTP_SUBNETMASK
51#define CONFIG_BOOTP_GATEWAY
52#define CONFIG_BOOTP_HOSTNAME
53#define CONFIG_BOOTP_BOOTPATH
54#define CONFIG_BOOTP_BOOTFILESIZE
55#define CONFIG_BOOTP_DNS
56#define CONFIG_BOOTP_DNS2
57
58#define CONFIG_HOSTNAME CONFIG_BOARD_NAME
59#define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
60
61/*
62 * U-Boot Commands
63 */
trem0053e3c2013-09-10 22:08:39 +020064#define CONFIG_CMD_BSP /* Board Specific functions */
trem0053e3c2013-09-10 22:08:39 +020065#define CONFIG_CMD_DATE
trem0053e3c2013-09-10 22:08:39 +020066#define CONFIG_CMD_EEPROM
trem0053e3c2013-09-10 22:08:39 +020067#define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
trem0053e3c2013-09-10 22:08:39 +020068#define CONFIG_CMD_MTDPARTS /* MTD partition support */
69#define CONFIG_CMD_NAND /* NAND support */
70#define CONFIG_CMD_NAND_LOCK_UNLOCK
71#define CONFIG_CMD_NAND_TRIMFFS
trem0053e3c2013-09-10 22:08:39 +020072#define CONFIG_CMD_UBIFS
73
74/*
75 * Memory configurations
76 */
77#define CONFIG_NR_DRAM_POPULATED 1
78#define CONFIG_NR_DRAM_BANKS 2
79
80#define ACFG_SDRAM_MBYTE_SYZE 64
81
82#define PHYS_SDRAM_1 0xA0000000
83#define PHYS_SDRAM_2 0xB0000000
84#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
85#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
86#define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
87#define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
88
89#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
90 + PHYS_SDRAM_1_SIZE - 0x0100000)
91
92#define CONFIG_SYS_TEXT_BASE 0xA0000800
93
94/*
95 * FLASH organization
96 */
97#define ACFG_MONITOR_OFFSET 0x00000000
98#define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
99#define CONFIG_ENV_IS_IN_NAND
100#define CONFIG_ENV_OVERWRITE
101#define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
102#define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
103#define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
104#define CONFIG_ENV_OFFSET_REDUND \
105 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
106#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
107#define CONFIG_FIRMWARE_OFFSET 0x00200000
108#define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
109#define CONFIG_KERNEL_OFFSET 0x00300000
110#define CONFIG_ROOTFS_OFFSET 0x00800000
111
112#define CONFIG_MTDMAP "mxc_nand.0"
113#define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
114#define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
115 ":1M(u-boot)ro," \
116 "512K(env)," \
117 "512K(env2)," \
118 "512K(firmware)," \
119 "512K(dtb)," \
120 "5M(kernel)," \
121 "-(rootfs)"
122
123/*
124 * U-Boot general configurations
125 */
126#define CONFIG_SYS_LONGHELP
trem0053e3c2013-09-10 22:08:39 +0200127#define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
128#define CONFIG_SYS_PBSIZE \
129 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
130 /* Print buffer size */
131#define CONFIG_SYS_MAXARGS 16 /* max command args */
132#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
133 /* Boot argument buffer size */
134#define CONFIG_AUTO_COMPLETE
135#define CONFIG_CMDLINE_EDITING
trem0053e3c2013-09-10 22:08:39 +0200136#define CONFIG_ENV_VARS_UBOOT_CONFIG
137#define CONFIG_PREBOOT "run check_flash check_env;"
138
trem0053e3c2013-09-10 22:08:39 +0200139/*
140 * Boot Linux
141 */
142#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
143#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
144#define CONFIG_INITRD_TAG /* send initrd params */
145
trem0053e3c2013-09-10 22:08:39 +0200146#define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
147#define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
148 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
149 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
150
151#define ACFG_CONSOLE_DEV ttySMX0
152#define CONFIG_BOOTCOMMAND "run ubifsboot"
153#define CONFIG_SYS_AUTOLOAD "no"
154/*
155 * Default load address for user programs and kernel
156 */
157#define CONFIG_LOADADDR 0xA0000000
158#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
159
160/*
161 * Extra Environments
162 */
163#define CONFIG_EXTRA_ENV_SETTINGS \
164 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
165 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
166 "mtdparts=" MTDPARTS_DEFAULT "\0" \
167 "partition=nand0,6\0" \
168 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
169 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
170 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
171 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
172 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
173 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
174 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
175 "kernel_addr_r=A0000000\0" \
176 "check_env=if test -n ${flash_env_version}; " \
177 "then env default env_version; " \
178 "else env set flash_env_version ${env_version}; env save; "\
179 "fi; " \
180 "if itest ${flash_env_version} < ${env_version}; then " \
181 "echo \"*** Warning - Environment version" \
182 " change suggests: run flash_reset_env; reset\"; "\
183 "env default flash_reset_env; "\
184 "fi; \0" \
185 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
186 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
187 "echo Flash environment variables erased!\0" \
188 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
189 "-u-boot-with-spl.bin\0" \
190 "flash_uboot=nand unlock ${u-boot_addr} ;" \
191 "nand erase.part u-boot;" \
192 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
193 "then nand lock; nand unlock ${env_addr};" \
194 "echo Flashing of uboot succeed;" \
195 "else echo Flashing of uboot failed;" \
196 "fi; \0" \
197 "update_uboot=run download_uboot flash_uboot\0" \
198 "download_env=tftpboot ${loadaddr} ${board_name}" \
199 "-u-boot-env.txt\0" \
200 "flash_env=env import -t ${loadaddr}; env save; \0" \
201 "update_env=run download_env flash_env\0" \
202 "update_all=run update_env update_uboot\0" \
203 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
204
205/*
206 * Serial Driver
207 */
208#define CONFIG_MXC_UART
209#define CONFIG_CONS_INDEX 1
210#define CONFIG_BAUDRATE 115200
211#define CONFIG_MXC_UART_BASE UART1_BASE
212
213/*
214 * GPIO
215 */
216#define CONFIG_MXC_GPIO
217
218/*
219 * NOR
220 */
221
222/*
223 * NAND
224 */
225#define CONFIG_NAND_MXC
226
227#define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
228#define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
229#define CONFIG_SYS_MAX_NAND_DEVICE 1
230
231#define CONFIG_MXC_NAND_HWECC
232#define CONFIG_SYS_NAND_LARGEPAGE
233#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
234#define CONFIG_SYS_NAND_PAGE_SIZE 2048
235#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
236#define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
237 CONFIG_SYS_NAND_PAGE_SIZE
238#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
239#define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
240#define NAND_MAX_CHIPS 1
241
242#define CONFIG_FLASH_SHOW_PROGRESS 45
243#define CONFIG_SYS_NAND_QUIET 1
244
245/*
246 * Partitions & Filsystems
247 */
248#define CONFIG_MTD_DEVICE
249#define CONFIG_MTD_PARTITIONS
250#define CONFIG_DOS_PARTITION
251#define CONFIG_SUPPORT_VFAT
252
253/*
254 * UBIFS
255 */
256#define CONFIG_RBTREE
257#define CONFIG_LZO
258
259/*
260 * Ethernet (on SOC imx FEC)
261 */
262#define CONFIG_FEC_MXC
263#define CONFIG_FEC_MXC_PHYADDR 0x1f
264#define CONFIG_MII /* MII PHY management */
265
266/*
trem97852892013-09-10 22:08:40 +0200267 * FPGA
268 */
269#ifndef CONFIG_SPL_BUILD
270#define CONFIG_FPGA
271#endif
272#define CONFIG_FPGA_COUNT 1
273#define CONFIG_FPGA_XILINX
274#define CONFIG_FPGA_SPARTAN3
275#define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
276#define CONFIG_SYS_FPGA_PROG_FEEDBACK
277#define CONFIG_SYS_FPGA_CHECK_CTRLC
278#define CONFIG_SYS_FPGA_CHECK_ERROR
279
280/*
trem0053e3c2013-09-10 22:08:39 +0200281 * Fuses - IIM
282 */
283#ifdef CONFIG_CMD_IMX_FUSE
284#define IIM_MAC_BANK 0
285#define IIM_MAC_ROW 5
286#define IIM0_SCC_KEY 11
287#define IIM1_SUID 1
288#endif
289
290/*
291 * I2C
292 */
293
294#ifdef CONFIG_CMD_I2C
trem03997412013-09-21 18:13:36 +0200295#define CONFIG_SYS_I2C
296#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +0200297#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
298#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
trem03997412013-09-21 18:13:36 +0200299#define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
300#define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
301#define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
302#define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
trem0053e3c2013-09-10 22:08:39 +0200303#define CONFIG_SYS_I2C_NOPROBES { }
304
305#ifdef CONFIG_CMD_EEPROM
306# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
307# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
308#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
309#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
310#endif /* CONFIG_CMD_EEPROM */
311#endif /* CONFIG_CMD_I2C */
312
313/*
314 * SD/MMC
315 */
316#ifdef CONFIG_CMD_MMC
317#define CONFIG_MMC
318#define CONFIG_GENERIC_MMC
319#define CONFIG_MXC_MMC
320#define CONFIG_MXC_MCI_REGS_BASE 0x10014000
321#endif
322
323/*
324 * RTC
325 */
326#ifdef CONFIG_CMD_DATE
327#define CONFIG_RTC_DS1374
328#define CONFIG_SYS_RTC_BUS_NUM 0
329#endif /* CONFIG_CMD_DATE */
330
331/*
trem0053e3c2013-09-10 22:08:39 +0200332 * PLL
333 *
334 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
335 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
336 */
337#define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
338
339#if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
340/* micron 64MB */
341#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
342#define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
343#endif
344
345#if (ACFG_SDRAM_MBYTE_SYZE == 128)
346/* micron 128MB */
347#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
348#define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
349#endif
350
351#if (ACFG_SDRAM_MBYTE_SYZE == 256)
352/* micron 256MB */
353#define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
354#define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
355#endif
356
357#endif /* __CONFIG_H */