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Dirk Behmebb732be2009-01-28 21:39:58 +01001/*
Tom Rini988a2352011-11-18 12:48:09 +00002 * (C) Copyright 2004-2011
Dirk Behmebb732be2009-01-28 21:39:58 +01003 * Texas Instruments, <www.ti.com>
4 *
5 * Author :
6 * Manikandan Pillai <mani.pillai@ti.com>
7 *
8 * Derived from Beagle Board and 3430 SDP code by
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <khasim@ti.com>
11 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020012 * SPDX-License-Identifier: GPL-2.0+
Dirk Behmebb732be2009-01-28 21:39:58 +010013 */
14#include <common.h>
Ben Warrenfbfdd3a2009-07-20 22:01:11 -070015#include <netdev.h>
Dirk Behmebb732be2009-01-28 21:39:58 +010016#include <asm/io.h>
17#include <asm/arch/mem.h>
18#include <asm/arch/mux.h>
19#include <asm/arch/sys_proto.h>
Vaibhav Hiremath4fdf2b72011-09-03 21:42:35 -040020#include <asm/arch/mmc_host_def.h>
Sanjeev Premi7b3dc822011-09-08 10:51:01 -040021#include <asm/gpio.h>
Dirk Behmebb732be2009-01-28 21:39:58 +010022#include <i2c.h>
23#include <asm/mach-types.h>
Tom Rini988a2352011-11-18 12:48:09 +000024#include <linux/mtd/nand.h>
Dirk Behmebb732be2009-01-28 21:39:58 +010025#include "evm.h"
26
Sriramakrishnan0f188c32011-07-18 09:21:55 -040027#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
28#define OMAP3EVM_GPIO_ETH_RST_GEN2 7
29
John Rigby0d21ed02010-12-20 18:27:51 -070030DECLARE_GLOBAL_DATA_PTR;
31
Dirk Behme85ed7092010-12-18 07:40:28 +010032static u32 omap3_evm_version;
Ajay Kumar Gupta13fc2bd2010-06-10 11:20:49 +053033
Dirk Behme85ed7092010-12-18 07:40:28 +010034u32 get_omap3_evm_rev(void)
Ajay Kumar Gupta13fc2bd2010-06-10 11:20:49 +053035{
36 return omap3_evm_version;
37}
38
39static void omap3_evm_get_revision(void)
40{
Sanjeev Premi88105fb2010-11-04 16:02:32 -040041#if defined(CONFIG_CMD_NET)
42 /*
43 * Board revision can be ascertained only by identifying
44 * the Ethernet chipset.
45 */
Ajay Kumar Gupta13fc2bd2010-06-10 11:20:49 +053046 unsigned int smsc_id;
47
48 /* Ethernet PHY ID is stored at ID_REV register */
49 smsc_id = readl(CONFIG_SMC911X_BASE + 0x50) & 0xFFFF0000;
50 printf("Read back SMSC id 0x%x\n", smsc_id);
51
52 switch (smsc_id) {
53 /* SMSC9115 chipset */
54 case 0x01150000:
55 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
56 break;
57 /* SMSC 9220 chipset */
58 case 0x92200000:
59 default:
60 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
61 }
Sanjeev Premi88105fb2010-11-04 16:02:32 -040062#else
63#if defined(CONFIG_STATIC_BOARD_REV)
64 /*
65 * Look for static defintion of the board revision
66 */
67 omap3_evm_version = CONFIG_STATIC_BOARD_REV;
68#else
69 /*
70 * Fallback to the default above.
71 */
72 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
73#endif
74#endif /* CONFIG_CMD_NET */
Ajay Kumar Gupta13fc2bd2010-06-10 11:20:49 +053075}
76
Sanjeev Premifa299ff2010-11-04 16:02:29 -040077#ifdef CONFIG_USB_OMAP3
Tom Rix558bb832009-04-01 22:02:20 -050078/*
Ajay Kumar Guptaaeeac6b2010-06-10 11:20:50 +053079 * MUSB port on OMAP3EVM Rev >= E requires extvbus programming.
80 */
81u8 omap3_evm_need_extvbus(void)
82{
83 u8 retval = 0;
84
85 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
86 retval = 1;
87
88 return retval;
89}
Sanjeev Premifa299ff2010-11-04 16:02:29 -040090#endif
Ajay Kumar Guptaaeeac6b2010-06-10 11:20:50 +053091
92/*
Dirk Behmebb732be2009-01-28 21:39:58 +010093 * Routine: board_init
94 * Description: Early hardware init.
Tom Rix558bb832009-04-01 22:02:20 -050095 */
Dirk Behmebb732be2009-01-28 21:39:58 +010096int board_init(void)
97{
Dirk Behmebb732be2009-01-28 21:39:58 +010098 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
99 /* board id for Linux */
100 gd->bd->bi_arch_number = MACH_TYPE_OMAP3EVM;
101 /* boot param addr */
102 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
103
104 return 0;
105}
106
Tom Rini988a2352011-11-18 12:48:09 +0000107#ifdef CONFIG_SPL_BUILD
108/*
109 * Routine: get_board_mem_timings
110 * Description: If we use SPL then there is no x-loader nor config header
111 * so we have to setup the DDR timings ourself on the first bank. This
112 * provides the timing values back to the function that configures
113 * the memory.
114 */
Peter Baradaedb5c2f2012-11-13 07:40:28 +0000115void get_board_mem_timings(struct board_sdrc_timings *timings)
Tom Rini988a2352011-11-18 12:48:09 +0000116{
117 int pop_mfr, pop_id;
118
119 /*
120 * We need to identify what PoP memory is on the board so that
121 * we know what timings to use. To map the ID values please see
122 * nand_ids.c
123 */
124 identify_nand_chip(&pop_mfr, &pop_id);
125
126 if (pop_mfr == NAND_MFR_HYNIX && pop_id == 0xbc) {
127 /* 256MB DDR */
Peter Baradaedb5c2f2012-11-13 07:40:28 +0000128 timings->mcfg = HYNIX_V_MCFG_200(256 << 20);
129 timings->ctrla = HYNIX_V_ACTIMA_200;
130 timings->ctrlb = HYNIX_V_ACTIMB_200;
Tom Rini988a2352011-11-18 12:48:09 +0000131 } else {
132 /* 128MB DDR */
Peter Baradaedb5c2f2012-11-13 07:40:28 +0000133 timings->mcfg = MICRON_V_MCFG_165(128 << 20);
134 timings->ctrla = MICRON_V_ACTIMA_165;
135 timings->ctrlb = MICRON_V_ACTIMB_165;
Tom Rini988a2352011-11-18 12:48:09 +0000136 }
Peter Baradaedb5c2f2012-11-13 07:40:28 +0000137 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
138 timings->mr = MICRON_V_MR_165;
Tom Rini988a2352011-11-18 12:48:09 +0000139}
140#endif
141
Tom Rix558bb832009-04-01 22:02:20 -0500142/*
Dirk Behmebb732be2009-01-28 21:39:58 +0100143 * Routine: misc_init_r
144 * Description: Init ethernet (done here so udelay works)
Tom Rix558bb832009-04-01 22:02:20 -0500145 */
Dirk Behmebb732be2009-01-28 21:39:58 +0100146int misc_init_r(void)
147{
148
Heiko Schocherf53f2b82013-10-22 11:03:18 +0200149#ifdef CONFIG_SYS_I2C_OMAP34XX
150 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
Dirk Behmebb732be2009-01-28 21:39:58 +0100151#endif
152
153#if defined(CONFIG_CMD_NET)
154 setup_net_chip();
155#endif
Sanjeev Premi88105fb2010-11-04 16:02:32 -0400156 omap3_evm_get_revision();
Dirk Behmebb732be2009-01-28 21:39:58 +0100157
Sanjeev Premi5e09e442011-07-18 09:20:15 -0400158#if defined(CONFIG_CMD_NET)
159 reset_net_chip();
160#endif
Dirk Behme12dbcf62009-03-12 19:30:50 +0100161 dieid_num_r();
162
Dirk Behmebb732be2009-01-28 21:39:58 +0100163 return 0;
164}
165
Tom Rix558bb832009-04-01 22:02:20 -0500166/*
Dirk Behmebb732be2009-01-28 21:39:58 +0100167 * Routine: set_muxconf_regs
168 * Description: Setting up the configuration Mux registers specific to the
169 * hardware. Many pins need to be moved from protect to primary
170 * mode.
Tom Rix558bb832009-04-01 22:02:20 -0500171 */
Dirk Behmebb732be2009-01-28 21:39:58 +0100172void set_muxconf_regs(void)
173{
174 MUX_EVM();
175}
176
Sanjeev Premi654e3ce2011-07-18 09:23:00 -0400177#ifdef CONFIG_CMD_NET
Tom Rix558bb832009-04-01 22:02:20 -0500178/*
Dirk Behmebb732be2009-01-28 21:39:58 +0100179 * Routine: setup_net_chip
180 * Description: Setting up the configuration GPMC registers specific to the
181 * Ethernet hardware.
Tom Rix558bb832009-04-01 22:02:20 -0500182 */
Dirk Behmebb732be2009-01-28 21:39:58 +0100183static void setup_net_chip(void)
184{
Dirk Behmedc7af202009-08-08 09:30:21 +0200185 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
Dirk Behmebb732be2009-01-28 21:39:58 +0100186
187 /* Configure GPMC registers */
Dirk Behmea4becd62009-08-08 09:30:22 +0200188 writel(NET_GPMC_CONFIG1, &gpmc_cfg->cs[5].config1);
189 writel(NET_GPMC_CONFIG2, &gpmc_cfg->cs[5].config2);
190 writel(NET_GPMC_CONFIG3, &gpmc_cfg->cs[5].config3);
191 writel(NET_GPMC_CONFIG4, &gpmc_cfg->cs[5].config4);
192 writel(NET_GPMC_CONFIG5, &gpmc_cfg->cs[5].config5);
193 writel(NET_GPMC_CONFIG6, &gpmc_cfg->cs[5].config6);
194 writel(NET_GPMC_CONFIG7, &gpmc_cfg->cs[5].config7);
Dirk Behmebb732be2009-01-28 21:39:58 +0100195
196 /* Enable off mode for NWE in PADCONF_GPMC_NWE register */
197 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe);
198 /* Enable off mode for NOE in PADCONF_GPMC_NADV_ALE register */
199 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe);
200 /* Enable off mode for ALE in PADCONF_GPMC_NADV_ALE register */
201 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
202 &ctrl_base->gpmc_nadv_ale);
Sanjeev Premi5e09e442011-07-18 09:20:15 -0400203}
204
205/**
206 * Reset the ethernet chip.
207 */
208static void reset_net_chip(void)
209{
Sriramakrishnan0f188c32011-07-18 09:21:55 -0400210 int ret;
211 int rst_gpio;
212
213 if (get_omap3_evm_rev() == OMAP3EVM_BOARD_GEN_1) {
214 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN1;
215 } else {
216 rst_gpio = OMAP3EVM_GPIO_ETH_RST_GEN2;
217 }
Dirk Behmebb732be2009-01-28 21:39:58 +0100218
Sanjeev Premi7b3dc822011-09-08 10:51:01 -0400219 ret = gpio_request(rst_gpio, "");
Sriramakrishnan0f188c32011-07-18 09:21:55 -0400220 if (ret < 0) {
221 printf("Unable to get GPIO %d\n", rst_gpio);
222 return ;
223 }
Dirk Behmebb732be2009-01-28 21:39:58 +0100224
Sriramakrishnan0f188c32011-07-18 09:21:55 -0400225 /* Configure as output */
Sanjeev Premi7b3dc822011-09-08 10:51:01 -0400226 gpio_direction_output(rst_gpio, 0);
Sriramakrishnan0f188c32011-07-18 09:21:55 -0400227
228 /* Send a pulse on the GPIO pin */
Sanjeev Premi7b3dc822011-09-08 10:51:01 -0400229 gpio_set_value(rst_gpio, 1);
Dirk Behmebb732be2009-01-28 21:39:58 +0100230 udelay(1);
Sanjeev Premi7b3dc822011-09-08 10:51:01 -0400231 gpio_set_value(rst_gpio, 0);
Dirk Behmebb732be2009-01-28 21:39:58 +0100232 udelay(1);
Sanjeev Premi7b3dc822011-09-08 10:51:01 -0400233 gpio_set_value(rst_gpio, 1);
Dirk Behmebb732be2009-01-28 21:39:58 +0100234}
Ben Warrenfbfdd3a2009-07-20 22:01:11 -0700235
236int board_eth_init(bd_t *bis)
237{
238 int rc = 0;
239#ifdef CONFIG_SMC911X
Sanjeev Premi9a2c3ac2011-09-02 05:57:16 +0000240#define STR_ENV_ETHADDR "ethaddr"
241
242 struct eth_device *dev;
243 uchar eth_addr[6];
244
Ben Warrenfbfdd3a2009-07-20 22:01:11 -0700245 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
Sanjeev Premi9a2c3ac2011-09-02 05:57:16 +0000246
247 if (!eth_getenv_enetaddr(STR_ENV_ETHADDR, eth_addr)) {
248 dev = eth_get_dev_by_index(0);
249 if (dev) {
250 eth_setenv_enetaddr(STR_ENV_ETHADDR, dev->enetaddr);
251 } else {
252 printf("omap3evm: Couldn't get eth device\n");
253 rc = -1;
254 }
255 }
Ben Warrenfbfdd3a2009-07-20 22:01:11 -0700256#endif
257 return rc;
258}
Sanjeev Premi654e3ce2011-07-18 09:23:00 -0400259#endif /* CONFIG_CMD_NET */
Vaibhav Hiremath4fdf2b72011-09-03 21:42:35 -0400260
Tom Rini988a2352011-11-18 12:48:09 +0000261#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
Vaibhav Hiremath4fdf2b72011-09-03 21:42:35 -0400262int board_mmc_init(bd_t *bis)
263{
Nikita Kiryanov4be9dbc2012-12-03 02:19:47 +0000264 return omap_mmc_init(0, 0, 0, -1, -1);
Vaibhav Hiremath4fdf2b72011-09-03 21:42:35 -0400265}
266#endif