blob: 774aa82b57feda4e6cb081a158240873fae1f638 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenkc4cbd342005-01-09 18:21:42 +00002/*
3 * (C) Copyright 2000-2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
wdenkc4cbd342005-01-09 18:21:42 +00005 */
6
Tom Rinidec7ea02024-05-20 13:35:03 -06007#include <config.h>
Simon Glass0ffd9db2019-12-28 10:45:06 -07008#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06009#include <asm/global_data.h>
TsiChungLiewcfa2b482007-08-15 19:41:06 -050010#include <asm/immap.h>
wdenkc4cbd342005-01-09 18:21:42 +000011
Simon Glass39f90ba2017-03-31 08:40:25 -060012DECLARE_GLOBAL_DATA_PTR;
wdenkc4cbd342005-01-09 18:21:42 +000013
14int checkboard (void)
15{
16 puts ("Board: ");
17 puts ("senTec COBRA5272 Board\n");
18 return 0;
19};
20
Simon Glassd35f3382017-04-06 12:47:05 -060021int dram_init(void)
wdenkc4cbd342005-01-09 18:21:42 +000022{
TsiChungLiewcfa2b482007-08-15 19:41:06 -050023 volatile sdramctrl_t *sdp = (sdramctrl_t *) (MMAP_SDRAM);
wdenkc4cbd342005-01-09 18:21:42 +000024
25 sdp->sdram_sdtr = 0xf539;
26 sdp->sdram_sdcr = 0x4211;
27
28 /* Dummy write to start SDRAM */
29 *((volatile unsigned long *) 0) = 0;
30
Tom Rinibb4dd962022-11-16 13:10:37 -050031 gd->ram_size = CFG_SYS_SDRAM_SIZE * 1024 * 1024;
Simon Glass39f90ba2017-03-31 08:40:25 -060032
33 return 0;
wdenkc4cbd342005-01-09 18:21:42 +000034};
35
Simon Glass0ffd9db2019-12-28 10:45:06 -070036int testdram(void)
wdenkc4cbd342005-01-09 18:21:42 +000037{
38 /* TODO: XXX XXX XXX */
39 printf ("DRAM test not implemented!\n");
40
41 return (0);
42}