Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2013 Freescale Semiconductor, Inc. |
| 4 | * |
| 5 | * Author: Fabio Estevam <fabio.estevam@freescale.com> |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 6 | */ |
| 7 | |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 8 | #include <init.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 9 | #include <net.h> |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 10 | #include <asm/arch/clock.h> |
| 11 | #include <asm/arch/imx-regs.h> |
| 12 | #include <asm/arch/iomux.h> |
Simon Glass | 5e6201b | 2019-08-01 09:46:51 -0600 | [diff] [blame] | 13 | #include <env.h> |
Giuseppe Pagano | cbadb0b | 2013-11-15 17:42:51 +0100 | [diff] [blame] | 14 | #include <malloc.h> |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 15 | #include <asm/arch/mx6-pins.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 16 | #include <asm/global_data.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 17 | #include <linux/delay.h> |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 18 | #include <linux/errno.h> |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 19 | #include <asm/gpio.h> |
Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 20 | #include <asm/mach-imx/iomux-v3.h> |
| 21 | #include <asm/mach-imx/sata.h> |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 22 | #include <asm/arch/crm_regs.h> |
| 23 | #include <asm/io.h> |
| 24 | #include <asm/arch/sys_proto.h> |
Giuseppe Pagano | cbadb0b | 2013-11-15 17:42:51 +0100 | [diff] [blame] | 25 | #include <micrel.h> |
| 26 | #include <miiphy.h> |
| 27 | #include <netdev.h> |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 28 | |
| 29 | DECLARE_GLOBAL_DATA_PTR; |
| 30 | |
| 31 | #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ |
| 32 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ |
| 33 | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 34 | |
Giuseppe Pagano | cbadb0b | 2013-11-15 17:42:51 +0100 | [diff] [blame] | 35 | #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ |
| 36 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
| 37 | |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 38 | #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ |
| 39 | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ |
| 40 | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 41 | |
| 42 | #define WDT_EN IMX_GPIO_NR(5, 4) |
| 43 | #define WDT_TRG IMX_GPIO_NR(3, 19) |
| 44 | |
| 45 | int dram_init(void) |
| 46 | { |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 47 | gd->ram_size = imx_ddr_size(); |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 48 | |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | static iomux_v3_cfg_t const uart2_pads[] = { |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 53 | IOMUX_PADS(PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), |
| 54 | IOMUX_PADS(PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 55 | }; |
| 56 | |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 57 | static iomux_v3_cfg_t const wdog_pads[] = { |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 58 | IOMUX_PADS(PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL)), |
| 59 | IOMUX_PADS(PAD_EIM_D19__GPIO3_IO19), |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 60 | }; |
| 61 | |
Giuseppe Pagano | cbadb0b | 2013-11-15 17:42:51 +0100 | [diff] [blame] | 62 | int mx6_rgmii_rework(struct phy_device *phydev) |
| 63 | { |
| 64 | /* |
| 65 | * Bug: Apparently uDoo does not works with Gigabit switches... |
| 66 | * Limiting speed to 10/100Mbps, and setting master mode, seems to |
| 67 | * be the only way to have a successfull PHY auto negotiation. |
| 68 | * How to fix: Understand why Linux kernel do not have this issue. |
| 69 | */ |
| 70 | phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00); |
| 71 | |
| 72 | /* control data pad skew - devaddr = 0x02, register = 0x04 */ |
| 73 | ksz9031_phy_extended_write(phydev, 0x02, |
| 74 | MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW, |
| 75 | MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000); |
| 76 | /* rx data pad skew - devaddr = 0x02, register = 0x05 */ |
| 77 | ksz9031_phy_extended_write(phydev, 0x02, |
| 78 | MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW, |
| 79 | MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000); |
| 80 | /* tx data pad skew - devaddr = 0x02, register = 0x05 */ |
| 81 | ksz9031_phy_extended_write(phydev, 0x02, |
| 82 | MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW, |
| 83 | MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x0000); |
| 84 | /* gtx and rx clock pad skew - devaddr = 0x02, register = 0x08 */ |
| 85 | ksz9031_phy_extended_write(phydev, 0x02, |
| 86 | MII_KSZ9031_EXT_RGMII_CLOCK_SKEW, |
| 87 | MII_KSZ9031_MOD_DATA_NO_POST_INC, 0x03FF); |
| 88 | return 0; |
| 89 | } |
| 90 | |
Giuseppe Pagano | cbadb0b | 2013-11-15 17:42:51 +0100 | [diff] [blame] | 91 | static void setup_iomux_enet(void) |
| 92 | { |
Giuseppe Pagano | cbadb0b | 2013-11-15 17:42:51 +0100 | [diff] [blame] | 93 | gpio_direction_output(IMX_GPIO_NR(2, 31), 1); /* Power supply on */ |
| 94 | |
| 95 | gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* assert PHY rst */ |
| 96 | |
| 97 | gpio_direction_output(IMX_GPIO_NR(6, 24), 1); |
| 98 | gpio_direction_output(IMX_GPIO_NR(6, 25), 1); |
| 99 | gpio_direction_output(IMX_GPIO_NR(6, 27), 1); |
| 100 | gpio_direction_output(IMX_GPIO_NR(6, 28), 1); |
| 101 | gpio_direction_output(IMX_GPIO_NR(6, 29), 1); |
| 102 | udelay(1000); |
| 103 | |
| 104 | gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* deassert PHY rst */ |
| 105 | |
| 106 | /* Need 100ms delay to exit from reset. */ |
| 107 | udelay(1000 * 100); |
| 108 | |
| 109 | gpio_free(IMX_GPIO_NR(6, 24)); |
| 110 | gpio_free(IMX_GPIO_NR(6, 25)); |
| 111 | gpio_free(IMX_GPIO_NR(6, 27)); |
| 112 | gpio_free(IMX_GPIO_NR(6, 28)); |
| 113 | gpio_free(IMX_GPIO_NR(6, 29)); |
Giuseppe Pagano | cbadb0b | 2013-11-15 17:42:51 +0100 | [diff] [blame] | 114 | } |
| 115 | |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 116 | static void setup_iomux_uart(void) |
| 117 | { |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 118 | SETUP_IOMUX_PADS(uart2_pads); |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | static void setup_iomux_wdog(void) |
| 122 | { |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 123 | SETUP_IOMUX_PADS(wdog_pads); |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 124 | gpio_direction_output(WDT_TRG, 0); |
| 125 | gpio_direction_output(WDT_EN, 1); |
Giuseppe Pagano | c154669 | 2013-11-15 17:42:54 +0100 | [diff] [blame] | 126 | gpio_direction_input(WDT_TRG); |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 127 | } |
| 128 | |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 129 | int board_early_init_f(void) |
| 130 | { |
| 131 | setup_iomux_wdog(); |
| 132 | setup_iomux_uart(); |
| 133 | |
| 134 | return 0; |
| 135 | } |
| 136 | |
Giuseppe Pagano | cbadb0b | 2013-11-15 17:42:51 +0100 | [diff] [blame] | 137 | int board_phy_config(struct phy_device *phydev) |
| 138 | { |
| 139 | mx6_rgmii_rework(phydev); |
| 140 | if (phydev->drv->config) |
| 141 | phydev->drv->config(phydev); |
| 142 | |
| 143 | return 0; |
| 144 | } |
| 145 | |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 146 | int board_init(void) |
| 147 | { |
| 148 | /* address of boot parameters */ |
| 149 | gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
| 150 | |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 151 | return 0; |
| 152 | } |
| 153 | |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 154 | int board_late_init(void) |
| 155 | { |
| 156 | #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
| 157 | if (is_cpu_type(MXC_CPU_MX6Q)) |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 158 | env_set("board_rev", "MX6Q"); |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 159 | else |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 160 | env_set("board_rev", "MX6DL"); |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 161 | #endif |
Peter Robinson | 01b7b2d | 2021-04-02 17:52:51 +0100 | [diff] [blame] | 162 | setup_iomux_enet(); |
| 163 | |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 164 | return 0; |
| 165 | } |
| 166 | |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 167 | int checkboard(void) |
| 168 | { |
vpeter4 | 76b08ce | 2015-08-03 12:49:05 +0200 | [diff] [blame] | 169 | if (is_cpu_type(MXC_CPU_MX6Q)) |
| 170 | puts("Board: Udoo Quad\n"); |
| 171 | else |
| 172 | puts("Board: Udoo DualLite\n"); |
Fabio Estevam | 5c824dd | 2013-09-26 22:59:25 -0300 | [diff] [blame] | 173 | |
| 174 | return 0; |
| 175 | } |