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git01.mediatek.com / filogic / uboot / f504d1a22a62c9d484c177f7e41550826931aa1f / . / configs / db-88f6720_defconfig
blob: 864c080f2b044aebf68923ddc53703477990a746 [file] [log] [blame]
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_MVEBU=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x00800000
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]4CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]5CONFIG_SPL_LIBGENERIC_SUPPORT=y
Masahiro Yamada75794f92016-09-19 21:40:26 +0900[diff] [blame]6CONFIG_SYS_MALLOC_F_LEN=0x2000
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]7CONFIG_TARGET_DB_88F6720=y
Simon Glasse076d6f2016-09-12 23:18:56 -0600[diff] [blame]8CONFIG_SPL_SERIAL_SUPPORT=y
Simon Glass219d6122016-09-12 23:18:57 -0600[diff] [blame]9CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassb24fdca2016-09-12 23:18:58 -0600[diff] [blame]10CONFIG_SPL_SPI_SUPPORT=y
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]11CONFIG_SPL=y
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]12CONFIG_DEFAULT_DEVICE_TREE="armada-375-db"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]13CONFIG_DEBUG_UART=y
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]14# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]15CONFIG_BOOTDELAY=3
Simon Glassbd5618d2016-10-17 20:13:00 -0600[diff] [blame]16CONFIG_SYS_CONSOLE_INFO_QUIET=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]17# CONFIG_DISPLAY_BOARDINFO is not set
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]18CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]19CONFIG_SPL_I2C_SUPPORT=y
Marek Vasute2542252018-04-07 16:05:27 +0200[diff] [blame]20CONFIG_SPL_SPI_LOAD=y
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]21# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]22CONFIG_CMD_I2C=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]23CONFIG_CMD_SF=y
24CONFIG_CMD_SPI=y
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]25CONFIG_CMD_USB=y
26# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]27CONFIG_CMD_DHCP=y
Tom Rinie8f8d672018-04-17 09:22:31 -0400[diff] [blame]28CONFIG_CMD_TFTPPUT=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]30CONFIG_CMD_PING=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]31CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]32CONFIG_CMD_TIME=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]33CONFIG_CMD_EXT2=y
34CONFIG_CMD_EXT4=y
35CONFIG_CMD_FAT=y
36CONFIG_CMD_FS_GENERIC=y
Patrick Delaunayf7e07722017-01-27 11:00:37 +0100[diff] [blame]37# CONFIG_DOS_PARTITION is not set
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]38CONFIG_ENV_IS_IN_SPI_FLASH=y
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]39CONFIG_NET_RANDOM_ETHADDR=y
40CONFIG_SPL_OF_TRANSLATE=y
41CONFIG_MISC=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]42# CONFIG_MMC is not set
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]43CONFIG_SPI_FLASH=y
44CONFIG_SPI_FLASH_MACRONIX=y
45CONFIG_SPI_FLASH_STMICRO=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame^]46CONFIG_PHY_MARVELL=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]47CONFIG_PHY_GIGE=y
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]48CONFIG_MVPP2=y
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]49CONFIG_DEBUG_UART_BASE=0xf1012000
50CONFIG_DEBUG_UART_CLOCK=250000000
51CONFIG_DEBUG_UART_SHIFT=2
52CONFIG_SYS_NS16550=y
Tuomas Tynkkynen13b5cb82018-02-07 02:42:22 +0200[diff] [blame]53CONFIG_KIRKWOOD_SPI=y
Stefan Roese9106ed02016-01-29 09:14:54 +0100[diff] [blame]54CONFIG_USB=y
55CONFIG_DM_USB=y
56CONFIG_USB_EHCI_HCD=y
57CONFIG_USB_STORAGE=y