blob: e1f6865f42c367703842260c46b9ee83a5210d44 [file] [log] [blame]
Kyle Moffetta8950192011-12-07 16:39:16 -05001/*
2 * Copyright 2009-2010 eXMeritus, A Boeing Company
3 * Copyright 2008-2009 Freescale Semiconductor, Inc.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * Version 2 as published by the Free Software Foundation.
8 */
9
10#include <common.h>
11
York Sunf0626592013-09-30 09:22:09 -070012#include <fsl_ddr_sdram.h>
13#include <fsl_ddr_dimm_params.h>
Kyle Moffetta8950192011-12-07 16:39:16 -050014
15void fsl_ddr_board_options(memctl_options_t *popts,
16 dimm_params_t *pdimm,
17 unsigned int ctrl_num)
18{
19 /*
20 * We only support one DIMM, so according to the P2020 docs we should
21 * set the options as follows:
22 */
23 popts->cs_local_opts[0].odt_rd_cfg = 0;
24 popts->cs_local_opts[0].odt_wr_cfg = 4;
25 popts->cs_local_opts[1].odt_rd_cfg = 0;
26 popts->cs_local_opts[1].odt_wr_cfg = 0;
27 popts->half_strength_driver_enable = 0;
28
29 /* Manually configured for our static clock rate */
30 popts->clk_adjust = 4;
31 popts->cpo_override = 4;
32 popts->write_data_delay = 2;
Priyanka Jain4a717412013-09-25 10:41:19 +053033 popts->twot_en = 0;
Kyle Moffetta8950192011-12-07 16:39:16 -050034}