blob: 84fae34777024e0f61654704b51cc079f6b66f35 [file] [log] [blame]
Peng Fanaeb9c062018-11-20 10:20:00 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef __IMX8M_EVK_H
7#define __IMX8M_EVK_H
8
9#include <linux/sizes.h>
10#include <asm/arch/imx-regs.h>
11
Peng Fanaeb9c062018-11-20 10:20:00 +000012#define CONFIG_SPL_MAX_SIZE (124 * 1024)
13#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
14#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
15#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
16#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
17
18#ifdef CONFIG_SPL_BUILD
19/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
20#define CONFIG_SPL_WATCHDOG_SUPPORT
21#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
22#define CONFIG_SPL_POWER_SUPPORT
23#define CONFIG_SPL_I2C_SUPPORT
24#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
25#define CONFIG_SPL_STACK 0x187FF0
26#define CONFIG_SPL_LIBCOMMON_SUPPORT
27#define CONFIG_SPL_LIBGENERIC_SUPPORT
28#define CONFIG_SPL_GPIO_SUPPORT
29#define CONFIG_SPL_MMC_SUPPORT
30#define CONFIG_SPL_BSS_START_ADDR 0x00180000
31#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
32#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
33#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
34#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
Peng Fanaeb9c062018-11-20 10:20:00 +000035
36/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
37#define CONFIG_MALLOC_F_ADDR 0x182000
38/* For RAW image gives a error info not panic */
39#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
40
41#undef CONFIG_DM_MMC
42#undef CONFIG_DM_PMIC
43#undef CONFIG_DM_PMIC_PFUZE100
44
45#define CONFIG_SYS_I2C
46#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
47#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
48#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
49
50#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
51
52#define CONFIG_POWER
53#define CONFIG_POWER_I2C
54#define CONFIG_POWER_PFUZE100
55#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
56#endif
57
58#define CONFIG_REMAKE_ELF
59
60#define CONFIG_BOARD_EARLY_INIT_F
61#define CONFIG_BOARD_LATE_INIT
62
63#undef CONFIG_CMD_EXPORTENV
64#undef CONFIG_CMD_IMPORTENV
65#undef CONFIG_CMD_IMLS
66
67#undef CONFIG_CMD_CRC32
Peng Fanaeb9c062018-11-20 10:20:00 +000068
69/* ENET Config */
70/* ENET1 */
71#if defined(CONFIG_CMD_NET)
72#define CONFIG_CMD_PING
73#define CONFIG_CMD_DHCP
74#define CONFIG_CMD_MII
75#define CONFIG_MII
76#define CONFIG_ETHPRIME "FEC"
77
78#define CONFIG_FEC_MXC
79#define CONFIG_FEC_XCV_TYPE RGMII
80#define CONFIG_FEC_MXC_PHYADDR 0
81#define FEC_QUIRK_ENET_MAC
82
83#define CONFIG_PHY_GIGE
84#define IMX_FEC_BASE 0x30BE0000
85
86#define CONFIG_PHYLIB
87#define CONFIG_PHY_ATHEROS
88#endif
89
90#define CONFIG_MFG_ENV_SETTINGS \
91 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
92 "rdinit=/linuxrc " \
93 "g_mass_storage.stall=0 g_mass_storage.removable=1 " \
94 "g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
95 "g_mass_storage.iSerialNumber=\"\" "\
96 "clk_ignore_unused "\
97 "\0" \
98 "initrd_addr=0x43800000\0" \
99 "initrd_high=0xffffffff\0" \
100 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
101/* Initial environment variables */
102#define CONFIG_EXTRA_ENV_SETTINGS \
103 CONFIG_MFG_ENV_SETTINGS \
104 "script=boot.scr\0" \
105 "image=Image\0" \
106 "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200\0" \
107 "fdt_addr=0x43000000\0" \
108 "fdt_high=0xffffffffffffffff\0" \
109 "boot_fdt=try\0" \
Patrick Wildt02548cf2019-10-14 13:19:00 +0200110 "fdt_file=imx8mq-evk.dtb\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +0000111 "initrd_addr=0x43800000\0" \
112 "initrd_high=0xffffffffffffffff\0" \
113 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
114 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
115 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
116 "mmcautodetect=yes\0" \
117 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
118 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
119 "bootscript=echo Running bootscript from mmc ...; " \
120 "source\0" \
121 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
122 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
123 "mmcboot=echo Booting from mmc ...; " \
124 "run mmcargs; " \
125 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
126 "if run loadfdt; then " \
127 "booti ${loadaddr} - ${fdt_addr}; " \
128 "else " \
129 "echo WARN: Cannot load the DT; " \
130 "fi; " \
131 "else " \
132 "echo wait for boot; " \
133 "fi;\0" \
134 "netargs=setenv bootargs console=${console} " \
135 "root=/dev/nfs " \
136 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
137 "netboot=echo Booting from net ...; " \
138 "run netargs; " \
139 "if test ${ip_dyn} = yes; then " \
140 "setenv get_cmd dhcp; " \
141 "else " \
142 "setenv get_cmd tftp; " \
143 "fi; " \
144 "${get_cmd} ${loadaddr} ${image}; " \
145 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
146 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
147 "booti ${loadaddr} - ${fdt_addr}; " \
148 "else " \
149 "echo WARN: Cannot load the DT; " \
150 "fi; " \
151 "else " \
152 "booti; " \
153 "fi;\0"
154
155#define CONFIG_BOOTCOMMAND \
156 "mmc dev ${mmcdev}; if mmc rescan; then " \
157 "if run loadbootscript; then " \
158 "run bootscript; " \
159 "else " \
160 "if run loadimage; then " \
161 "run mmcboot; " \
162 "else run netboot; " \
163 "fi; " \
164 "fi; " \
165 "else booti ${loadaddr} - ${fdt_addr}; fi"
166
167/* Link Definitions */
168#define CONFIG_LOADADDR 0x40480000
169
170#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
171
172#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
173#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
174#define CONFIG_SYS_INIT_SP_OFFSET \
175 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
176#define CONFIG_SYS_INIT_SP_ADDR \
177 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
178
179#define CONFIG_ENV_OVERWRITE
180#define CONFIG_ENV_OFFSET (64 * SZ_64K)
181#define CONFIG_ENV_SIZE 0x1000
Peng Fanaeb9c062018-11-20 10:20:00 +0000182#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
183#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
184
185/* Size of malloc() pool */
186#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
187
188#define CONFIG_SYS_SDRAM_BASE 0x40000000
189#define PHYS_SDRAM 0x40000000
190#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
191
192#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
193#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
194 (PHYS_SDRAM_SIZE >> 1))
195
196#define CONFIG_BAUDRATE 115200
197
198#define CONFIG_MXC_UART
199#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
200
201/* Monitor Command Prompt */
202#undef CONFIG_SYS_PROMPT
203#define CONFIG_SYS_PROMPT "u-boot=> "
204#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
205#define CONFIG_SYS_CBSIZE 1024
206#define CONFIG_SYS_MAXARGS 64
207#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
208#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
209 sizeof(CONFIG_SYS_PROMPT) + 16)
210
211#define CONFIG_IMX_BOOTAUX
212
213#define CONFIG_CMD_MMC
Peng Fanaeb9c062018-11-20 10:20:00 +0000214
215#define CONFIG_SYS_FSL_USDHC_NUM 2
216#define CONFIG_SYS_FSL_ESDHC_ADDR 0
217
Peng Fanaeb9c062018-11-20 10:20:00 +0000218#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
219
220#define CONFIG_MXC_GPIO
221
Peng Fanaeb9c062018-11-20 10:20:00 +0000222#define CONFIG_CMD_FUSE
223
224/* I2C Configs */
225#define CONFIG_SYS_I2C_SPEED 100000
226
227#define CONFIG_OF_SYSTEM_SETUP
228
229#ifndef CONFIG_SPL_BUILD
230#define CONFIG_DM_PMIC
231#endif
232
233#endif