Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 NVIDIA Corporation |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #define pr_fmt(fmt) "as3722: " fmt |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <dm.h> |
| 10 | #include <errno.h> |
| 11 | #include <fdtdec.h> |
| 12 | #include <i2c.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 13 | #include <log.h> |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 14 | #include <dm/lists.h> |
Simon Glass | bdd5f81 | 2023-09-14 18:21:46 -0600 | [diff] [blame] | 15 | #include <linux/printk.h> |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 16 | #include <power/as3722.h> |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 17 | #include <power/pmic.h> |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 18 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 19 | #define AS3722_NUM_OF_REGS 0x92 |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 20 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 21 | static int as3722_read(struct udevice *dev, uint reg, uint8_t *buff, int len) |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 22 | { |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 23 | int ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 24 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 25 | ret = dm_i2c_read(dev, reg, buff, len); |
| 26 | if (ret < 0) |
| 27 | return ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 28 | |
| 29 | return 0; |
| 30 | } |
| 31 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 32 | static int as3722_write(struct udevice *dev, uint reg, const uint8_t *buff, |
| 33 | int len) |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 34 | { |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 35 | int ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 36 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 37 | ret = dm_i2c_write(dev, reg, buff, len); |
| 38 | if (ret < 0) |
| 39 | return ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 40 | |
| 41 | return 0; |
| 42 | } |
| 43 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 44 | static int as3722_read_id(struct udevice *dev, uint *idp, uint *revisionp) |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 45 | { |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 46 | int ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 47 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 48 | ret = pmic_reg_read(dev, AS3722_ASIC_ID1); |
| 49 | if (ret < 0) { |
Simon Glass | 73126ac | 2018-11-18 08:14:28 -0700 | [diff] [blame] | 50 | pr_err("failed to read ID1 register: %d\n", ret); |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 51 | return ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 52 | } |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 53 | *idp = ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 54 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 55 | ret = pmic_reg_read(dev, AS3722_ASIC_ID2); |
| 56 | if (ret < 0) { |
Simon Glass | 73126ac | 2018-11-18 08:14:28 -0700 | [diff] [blame] | 57 | pr_err("failed to read ID2 register: %d\n", ret); |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 58 | return ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 59 | } |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 60 | *revisionp = ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 61 | |
| 62 | return 0; |
| 63 | } |
| 64 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 65 | /* TODO(treding@nvidia.com): Add proper regulator support to avoid this */ |
| 66 | int as3722_sd_set_voltage(struct udevice *dev, unsigned int sd, u8 value) |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 67 | { |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 68 | int ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 69 | |
| 70 | if (sd > 6) |
| 71 | return -EINVAL; |
| 72 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 73 | ret = pmic_reg_write(dev, AS3722_SD_VOLTAGE(sd), value); |
| 74 | if (ret < 0) { |
Simon Glass | 73126ac | 2018-11-18 08:14:28 -0700 | [diff] [blame] | 75 | pr_err("failed to write SD%u voltage register: %d\n", sd, ret); |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 76 | return ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 77 | } |
| 78 | |
| 79 | return 0; |
| 80 | } |
| 81 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 82 | int as3722_ldo_set_voltage(struct udevice *dev, unsigned int ldo, u8 value) |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 83 | { |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 84 | int ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 85 | |
| 86 | if (ldo > 11) |
| 87 | return -EINVAL; |
| 88 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 89 | ret = pmic_reg_write(dev, AS3722_LDO_VOLTAGE(ldo), value); |
| 90 | if (ret < 0) { |
Simon Glass | 73126ac | 2018-11-18 08:14:28 -0700 | [diff] [blame] | 91 | pr_err("failed to write LDO%u voltage register: %d\n", ldo, |
| 92 | ret); |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 93 | return ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 94 | } |
| 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 99 | static int as3722_probe(struct udevice *dev) |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 100 | { |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 101 | uint id, revision; |
| 102 | int ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 103 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 104 | ret = as3722_read_id(dev, &id, &revision); |
| 105 | if (ret < 0) { |
Simon Glass | 73126ac | 2018-11-18 08:14:28 -0700 | [diff] [blame] | 106 | pr_err("failed to read ID: %d\n", ret); |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 107 | return ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 108 | } |
| 109 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 110 | if (id != AS3722_DEVICE_ID) { |
Simon Glass | 73126ac | 2018-11-18 08:14:28 -0700 | [diff] [blame] | 111 | pr_err("unknown device\n"); |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 112 | return -ENOENT; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 113 | } |
| 114 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 115 | debug("AS3722 revision %#x found on I2C bus %s\n", revision, dev->name); |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 116 | |
| 117 | return 0; |
| 118 | } |
| 119 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 120 | #if CONFIG_IS_ENABLED(PMIC_CHILDREN) |
| 121 | static const struct pmic_child_info pmic_children_info[] = { |
| 122 | { .prefix = "sd", .driver = "as3722_stepdown"}, |
| 123 | { .prefix = "ldo", .driver = "as3722_ldo"}, |
| 124 | { }, |
| 125 | }; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 126 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 127 | static int as3722_bind(struct udevice *dev) |
| 128 | { |
| 129 | struct udevice *gpio_dev; |
| 130 | ofnode regulators_node; |
| 131 | int children; |
| 132 | int ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 133 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 134 | regulators_node = dev_read_subnode(dev, "regulators"); |
| 135 | if (!ofnode_valid(regulators_node)) { |
| 136 | debug("%s: %s regulators subnode not found\n", __func__, |
| 137 | dev->name); |
| 138 | return -ENXIO; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 139 | } |
| 140 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 141 | children = pmic_bind_children(dev, regulators_node, pmic_children_info); |
| 142 | if (!children) |
| 143 | debug("%s: %s - no child found\n", __func__, dev->name); |
| 144 | ret = device_bind_driver(dev, "gpio_as3722", "gpio_as3722", &gpio_dev); |
| 145 | if (ret) { |
| 146 | debug("%s: Cannot bind GPIOs (ret=%d)\n", __func__, ret); |
| 147 | return ret; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | return 0; |
| 151 | } |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 152 | #endif |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 153 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 154 | static int as3722_reg_count(struct udevice *dev) |
Simon Glass | 053da13 | 2015-04-14 21:03:26 -0600 | [diff] [blame] | 155 | { |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 156 | return AS3722_NUM_OF_REGS; |
Simon Glass | 053da13 | 2015-04-14 21:03:26 -0600 | [diff] [blame] | 157 | } |
| 158 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 159 | static struct dm_pmic_ops as3722_ops = { |
| 160 | .reg_count = as3722_reg_count, |
| 161 | .read = as3722_read, |
| 162 | .write = as3722_write, |
| 163 | }; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 164 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 165 | static const struct udevice_id as3722_ids[] = { |
| 166 | { .compatible = "ams,as3722" }, |
| 167 | { } |
| 168 | }; |
Thierry Reding | 09c0cf2 | 2014-12-09 22:25:05 -0700 | [diff] [blame] | 169 | |
Simon Glass | b3d2ed3 | 2017-07-25 08:30:12 -0600 | [diff] [blame] | 170 | U_BOOT_DRIVER(pmic_as3722) = { |
| 171 | .name = "as3722_pmic", |
| 172 | .id = UCLASS_PMIC, |
| 173 | .of_match = as3722_ids, |
| 174 | #if CONFIG_IS_ENABLED(PMIC_CHILDREN) |
| 175 | .bind = as3722_bind, |
| 176 | #endif |
| 177 | .probe = as3722_probe, |
| 178 | .ops = &as3722_ops, |
| 179 | }; |