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TsiChungLiewfc3ca3b62007-08-16 15:05:11 -05001/*
2 *
3 * (C) Copyright 2000-2004
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
Alison Wang8d8dac92012-03-26 21:49:08 +00006 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -05007 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050010 */
11
12/* CPU specific interrupt routine */
13#include <common.h>
14#include <asm/immap.h>
Alison Wang8d8dac92012-03-26 21:49:08 +000015#include <asm/io.h>
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050016
17int interrupt_init(void)
18{
Alison Wang8d8dac92012-03-26 21:49:08 +000019 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050020
21 /* Make sure all interrupts are disabled */
Alison Wang8d8dac92012-03-26 21:49:08 +000022 setbits_be32(&intp->imrh0, 0xffffffff);
23 setbits_be32(&intp->imrl0, 0xffffffff);
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050024
25 enable_interrupts();
26 return 0;
27}
28
29#if defined(CONFIG_MCFTMR)
30void dtimer_intr_setup(void)
31{
Alison Wang8d8dac92012-03-26 21:49:08 +000032 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050033
Alison Wang8d8dac92012-03-26 21:49:08 +000034 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
35 clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK);
TsiChungLiewfc3ca3b62007-08-16 15:05:11 -050036}
37#endif