TsiChung Liew | f6afe72 | 2007-06-18 13:50:13 -0500 | [diff] [blame] | 1 | /* |
| 2 | * RealTime Clock |
| 3 | * |
TsiChungLiew | c7d0b9e | 2007-07-05 23:21:09 -0500 | [diff] [blame] | 4 | * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. |
TsiChung Liew | f6afe72 | 2007-06-18 13:50:13 -0500 | [diff] [blame] | 5 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) |
| 6 | * |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #ifndef __MCFRTC_H__ |
| 27 | #define __MCFRTC_H__ |
| 28 | |
| 29 | /* Real time Clock */ |
| 30 | typedef struct rtc_ctrl { |
| 31 | u32 hourmin; /* 0x00 Hours and Minutes Counter Register */ |
| 32 | u32 seconds; /* 0x04 Seconds Counter Register */ |
| 33 | u32 alrm_hm; /* 0x08 Hours and Minutes Alarm Register */ |
| 34 | u32 alrm_sec; /* 0x0C Seconds Alarm Register */ |
| 35 | u32 cr; /* 0x10 Control Register */ |
| 36 | u32 isr; /* 0x14 Interrupt Status Register */ |
| 37 | u32 ier; /* 0x18 Interrupt Enable Register */ |
TsiChungLiew | fc3ca3b | 2007-08-16 15:05:11 -0500 | [diff] [blame] | 38 | u32 stpwatch; /* 0x1C Stopwatch Minutes Register */ |
TsiChung Liew | f6afe72 | 2007-06-18 13:50:13 -0500 | [diff] [blame] | 39 | u32 days; /* 0x20 Days Counter Register */ |
| 40 | u32 alrm_day; /* 0x24 Days Alarm Register */ |
TsiChungLiew | fc3ca3b | 2007-08-16 15:05:11 -0500 | [diff] [blame] | 41 | void *extended; |
TsiChung Liew | f6afe72 | 2007-06-18 13:50:13 -0500 | [diff] [blame] | 42 | } rtc_t; |
| 43 | |
| 44 | /* Bit definitions and macros for HOURMIN */ |
| 45 | #define RTC_HOURMIN_MINUTES(x) (((x)&0x0000003F)) |
| 46 | #define RTC_HOURMIN_HOURS(x) (((x)&0x0000001F)<<8) |
| 47 | |
| 48 | /* Bit definitions and macros for SECONDS */ |
| 49 | #define RTC_SECONDS_SECONDS(x) (((x)&0x0000003F)) |
| 50 | |
| 51 | /* Bit definitions and macros for ALRM_HM */ |
| 52 | #define RTC_ALRM_HM_MINUTES(x) (((x)&0x0000003F)) |
| 53 | #define RTC_ALRM_HM_HOURS(x) (((x)&0x0000001F)<<8) |
| 54 | |
| 55 | /* Bit definitions and macros for ALRM_SEC */ |
| 56 | #define RTC_ALRM_SEC_SECONDS(x) (((x)&0x0000003F)) |
| 57 | |
| 58 | /* Bit definitions and macros for CR */ |
| 59 | #define RTC_CR_SWR (0x00000001) |
| 60 | #define RTC_CR_XTL(x) (((x)&0x00000003)<<5) |
| 61 | #define RTC_CR_EN (0x00000080) |
| 62 | #define RTC_CR_32768 (0x0) |
| 63 | #define RTC_CR_32000 (0x1) |
| 64 | #define RTC_CR_38400 (0x2) |
| 65 | |
| 66 | /* Bit definitions and macros for ISR */ |
| 67 | #define RTC_ISR_SW (0x00000001) |
| 68 | #define RTC_ISR_MIN (0x00000002) |
| 69 | #define RTC_ISR_ALM (0x00000004) |
| 70 | #define RTC_ISR_DAY (0x00000008) |
| 71 | #define RTC_ISR_1HZ (0x00000010) |
| 72 | #define RTC_ISR_HR (0x00000020) |
| 73 | #define RTC_ISR_2HZ (0x00000080) |
| 74 | #define RTC_ISR_SAM0 (0x00000100) |
| 75 | #define RTC_ISR_SAM1 (0x00000200) |
| 76 | #define RTC_ISR_SAM2 (0x00000400) |
| 77 | #define RTC_ISR_SAM3 (0x00000800) |
| 78 | #define RTC_ISR_SAM4 (0x00001000) |
| 79 | #define RTC_ISR_SAM5 (0x00002000) |
| 80 | #define RTC_ISR_SAM6 (0x00004000) |
| 81 | #define RTC_ISR_SAM7 (0x00008000) |
| 82 | |
| 83 | /* Bit definitions and macros for IER */ |
| 84 | #define RTC_IER_SW (0x00000001) |
| 85 | #define RTC_IER_MIN (0x00000002) |
| 86 | #define RTC_IER_ALM (0x00000004) |
| 87 | #define RTC_IER_DAY (0x00000008) |
| 88 | #define RTC_IER_1HZ (0x00000010) |
| 89 | #define RTC_IER_HR (0x00000020) |
| 90 | #define RTC_IER_2HZ (0x00000080) |
| 91 | #define RTC_IER_SAM0 (0x00000100) |
| 92 | #define RTC_IER_SAM1 (0x00000200) |
| 93 | #define RTC_IER_SAM2 (0x00000400) |
| 94 | #define RTC_IER_SAM3 (0x00000800) |
| 95 | #define RTC_IER_SAM4 (0x00001000) |
| 96 | #define RTC_IER_SAM5 (0x00002000) |
| 97 | #define RTC_IER_SAM6 (0x00004000) |
| 98 | #define RTC_IER_SAM7 (0x00008000) |
| 99 | |
| 100 | /* Bit definitions and macros for STPWCH */ |
| 101 | #define RTC_STPWCH_CNT(x) (((x)&0x0000003F)) |
| 102 | |
| 103 | /* Bit definitions and macros for DAYS */ |
| 104 | #define RTC_DAYS_DAYS(x) (((x)&0x0000FFFF)) |
| 105 | |
| 106 | /* Bit definitions and macros for ALRM_DAY */ |
| 107 | #define RTC_ALRM_DAY_DAYS(x) (((x)&0x0000FFFF)) |
| 108 | |
| 109 | #endif /* __MCFRTC_H__ */ |