Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / f431e2683b1b0d568ecd41f17ad010b780f5bb8e / . / arch / powerpc / cpu / mpc5xxx / u-boot-customlayout.lds
blob: 5354172af0eb058bf5b307a6a63fe18c287c43d0 [file] [log] [blame]
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]1/*
2 * (C) Copyright 2003-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]5 * SPDX-License-Identifier: GPL-2.0+
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]6 */
7
8OUTPUT_ARCH(powerpc)
Wolfgang Denk01fd9152010-11-23 13:20:22 +0100[diff] [blame]9
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]10SECTIONS
11{
12 /* Read-only sections, merged into text segment: */
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]13 .text :
14 {
15 /* WARNING - the following is hand-optimized to fit within */
16 /* the sector layout of our flash chips! XXX FIXME XXX */
17
Wolfgang Denk01fd9152010-11-23 13:20:22 +0100[diff] [blame]18 arch/powerpc/cpu/mpc5xxx/start.o (.text*)
19 arch/powerpc/cpu/mpc5xxx/traps.o (.text*)
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]20
21 . = DEFINED(env_offset) ? env_offset : .;
Wolfgang Denk01fd9152010-11-23 13:20:22 +0100[diff] [blame]22 common/env_embedded.o (.ppcenv*)
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]23
Wolfgang Denk01fd9152010-11-23 13:20:22 +0100[diff] [blame]24 *(.text*)
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]25 . = ALIGN(16);
Trent Piepho4438e5e2009-02-18 15:22:05 -0800[diff] [blame]26 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]27 }
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]28
29 /* Read-write section, merged into data segment: */
30 . = (. + 0x0FFF) & 0xFFFFF000;
31 _erotext = .;
32 PROVIDE (erotext = .);
33 .reloc :
34 {
Wolfgang Denk01fd9152010-11-23 13:20:22 +0100[diff] [blame]35 KEEP(*(.got))
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]36 _GOT2_TABLE_ = .;
Wolfgang Denk01fd9152010-11-23 13:20:22 +0100[diff] [blame]37 KEEP(*(.got2))
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]38 _FIXUP_TABLE_ = .;
Wolfgang Denk01fd9152010-11-23 13:20:22 +0100[diff] [blame]39 KEEP(*(.fixup))
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]40 }
41 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
42 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
43
44 .data :
45 {
Wolfgang Denk01fd9152010-11-23 13:20:22 +0100[diff] [blame]46 *(.data*)
47 *(.sdata*)
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]48 }
49 _edata = .;
50 PROVIDE (edata = .);
51
52 . = .;
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]53
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]54 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +0000[diff] [blame]55 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +0000[diff] [blame]56 }
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]57
58 . = .;
59 __start___ex_table = .;
60 __ex_table : { *(__ex_table) }
61 __stop___ex_table = .;
62
63 . = ALIGN(4096);
64 __init_begin = .;
65 .text.init : { *(.text.init) }
66 .data.init : { *(.data.init) }
67 . = ALIGN(4096);
68 __init_end = .;
69
70 __bss_start = .;
Wolfgang Denk828a9782008-01-12 20:31:39 +0100[diff] [blame]71 .bss (NOLOAD) :
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]72 {
Wolfgang Denk01fd9152010-11-23 13:20:22 +0100[diff] [blame]73 *(.bss*)
74 *(.sbss*)
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]75 *(COMMON)
Selvamuthukumard2454ba2008-10-16 22:54:03 +0530[diff] [blame]76 . = ALIGN(4);
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]77 }
Simon Glassed70c8f2013-03-14 06:54:53 +0000[diff] [blame]78 __bss_end = . ;
Grant Likely17208ae2007-07-03 00:32:58 -0600[diff] [blame]79 PROVIDE (end = .);
80}