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git01.mediatek.com / filogic / uboot / f429bb9e39b07302bbb7052844d67d02bdc60ad2 / . / arch / arm / mach-imx / mx6 / module_fuse.c
blob: 8b23d48a854cfb33e6d1327dd930c162f5c89b75 [file] [log] [blame]
Peng Fan415f8952020-05-01 22:08:34 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 NXP
4 */
5
Peng Fan415f8952020-05-01 22:08:34 +0800[diff] [blame]6#include <fdt_support.h>
7#include <asm/io.h>
8#include <asm/arch/sys_proto.h>
9#include <asm/arch/imx-regs.h>
10#include <asm/mach-imx/module_fuse.h>
11#include <linux/errno.h>
12
13static struct fuse_entry_desc mx6_fuse_descs[] = {
14#if defined(CONFIG_MX6ULL)
15 {MODULE_TSC, "/soc/aips-bus@2000000/tsc@2040000", 0x430, 22},
16 {MODULE_ADC2, "/soc/aips-bus@2100000/adc@219c000", 0x430, 23},
17 {MODULE_EPDC, "/soc/aips-bus@2200000/epdc@228c000", 0x430, 24},
18 {MODULE_ESAI, "/soc/aips-bus@2000000/spba-bus@2000000/esai@2024000", 0x430, 25},
19 {MODULE_FLEXCAN1, "/soc/aips-bus@2000000/can@2090000", 0x430, 26},
20 {MODULE_FLEXCAN2, "/soc/aips-bus@2000000/can@2094000", 0x430, 27},
21 {MODULE_SPDIF, "/soc/aips-bus@2000000/spba-bus@2000000/spdif@2004000", 0x440, 2},
22 {MODULE_EIM, "/soc/aips-bus@2100000/weim@21b8000", 0x440, 3},
23 {MODULE_SD1, "/soc/aips-bus@2100000/usdhc@2190000", 0x440, 4},
24 {MODULE_SD2, "/soc/aips-bus@2100000/usdhc@2194000", 0x440, 5},
25 {MODULE_QSPI1, "/soc/aips-bus@2100000/qspi@21e0000", 0x440, 6},
26 {MODULE_GPMI, "/soc/gpmi-nand@1806000", 0x440, 7},
27 {MODULE_APBHDMA, "/soc/dma-apbh@1804000", 0x440, 7},
28 {MODULE_LCDIF, "/soc/aips-bus@2100000/lcdif@21c8000", 0x440, 8},
29 {MODULE_PXP, "/soc/aips-bus@2100000/pxp@21cc000", 0x440, 9},
30 {MODULE_CSI, "/soc/aips-bus@2100000/csi@21c4000", 0x440, 10},
31 {MODULE_ADC1, "/soc/aips-bus@2100000/adc@2198000", 0x440, 11},
32 {MODULE_ENET1, "/soc/aips-bus@2100000/ethernet@2188000", 0x440, 12},
33 {MODULE_ENET2, "/soc/aips-bus@2000000/ethernet@20b4000", 0x440, 13},
34 {MODULE_DCP, "/soc/aips-bus@2200000/dcp@2280000", 0x440, 14},
35 {MODULE_USB_OTG2, "/soc/aips-bus@2100000/usb@2184200", 0x440, 15},
36 {MODULE_SAI2, "/soc/aips-bus@2000000/spba-bus@2000000/sai@202c000", 0x440, 24},
37 {MODULE_SAI3, "/soc/aips-bus@2000000/spba-bus@2000000/sai@2030000", 0x440, 24},
38 {MODULE_DCP_CRYPTO, "/soc/aips-bus@2200000/dcp@2280000", 0x440, 25},
39 {MODULE_UART5, "/soc/aips-bus@2100000/serial@21f4000", 0x440, 26},
40 {MODULE_UART6, "/soc/aips-bus@2100000/serial@21fc000", 0x440, 26},
41 {MODULE_UART7, "/soc/aips-bus@2000000/spba-bus@2000000/serial@2018000", 0x440, 26},
42 {MODULE_UART8, "/soc/aips-bus@2200000/serial@2288000", 0x440, 26},
43 {MODULE_PWM5, "/soc/aips-bus@2000000/pwm@20f0000", 0x440, 27},
44 {MODULE_PWM6, "/soc/aips-bus@2000000/pwm@20f4000", 0x440, 27},
45 {MODULE_PWM7, "/soc/aips-bus@2000000/pwm@20f8000", 0x440, 27},
46 {MODULE_PWM8, "/soc/aips-bus@2000000/pwm@20fc000", 0x440, 27},
47 {MODULE_ECSPI3, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2010000", 0x440, 28},
48 {MODULE_ECSPI4, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000", 0x440, 28},
49 {MODULE_I2C3, "/soc/aips-bus@2100000/i2c@21a8000", 0x440, 29},
50 {MODULE_I2C4, "/soc/aips-bus@2100000/i2c@21f8000", 0x440, 29},
51 {MODULE_GPT2, "/soc/aips-bus@2000000/gpt@20e8000", 0x440, 30},
52 {MODULE_EPIT2, "/soc/aips-bus@2000000/epit@20d4000", 0x440, 31},
53 /* Paths for older imx tree: */
54 {MODULE_TSC, "/soc/aips-bus@02000000/tsc@02040000", 0x430, 22},
55 {MODULE_ADC2, "/soc/aips-bus@02100000/adc@0219c000", 0x430, 23},
56 {MODULE_EPDC, "/soc/aips-bus@02200000/epdc@0228c000", 0x430, 24},
57 {MODULE_ESAI, "/soc/aips-bus@02000000/spba-bus@02000000/esai@02024000", 0x430, 25},
58 {MODULE_FLEXCAN1, "/soc/aips-bus@02000000/can@02090000", 0x430, 26},
59 {MODULE_FLEXCAN2, "/soc/aips-bus@02000000/can@02094000", 0x430, 27},
60 {MODULE_SPDIF, "/soc/aips-bus@02000000/spba-bus@02000000/spdif@02004000", 0x440, 2},
61 {MODULE_EIM, "/soc/aips-bus@02100000/weim@021b8000", 0x440, 3},
62 {MODULE_SD1, "/soc/aips-bus@02100000/usdhc@02190000", 0x440, 4},
63 {MODULE_SD2, "/soc/aips-bus@02100000/usdhc@02194000", 0x440, 5},
64 {MODULE_QSPI1, "/soc/aips-bus@02100000/qspi@021e0000", 0x440, 6},
65 {MODULE_GPMI, "/soc/gpmi-nand@01806000", 0x440, 7},
66 {MODULE_APBHDMA, "/soc/dma-apbh@01804000", 0x440, 7},
67 {MODULE_LCDIF, "/soc/aips-bus@02100000/lcdif@021c8000", 0x440, 8},
68 {MODULE_PXP, "/soc/aips-bus@02100000/pxp@021cc000", 0x440, 9},
69 {MODULE_CSI, "/soc/aips-bus@02100000/csi@021c4000", 0x440, 10},
70 {MODULE_ADC1, "/soc/aips-bus@02100000/adc@02198000", 0x440, 11},
71 {MODULE_ENET1, "/soc/aips-bus@02100000/ethernet@02188000", 0x440, 12},
72 {MODULE_ENET2, "/soc/aips-bus@02000000/ethernet@020b4000", 0x440, 13},
73 {MODULE_DCP, "/soc/aips-bus@02200000/dcp@02280000", 0x440, 14},
74 {MODULE_USB_OTG2, "/soc/aips-bus@02100000/usb@02184200", 0x440, 15},
75 {MODULE_SAI2, "/soc/aips-bus@02000000/spba-bus@02000000/sai@0202c000", 0x440, 24},
76 {MODULE_SAI3, "/soc/aips-bus@02000000/spba-bus@02000000/sai@02030000", 0x440, 24},
77 {MODULE_DCP_CRYPTO, "/soc/aips-bus@02200000/dcp@02280000", 0x440, 25},
78 {MODULE_UART5, "/soc/aips-bus@02100000/serial@021f4000", 0x440, 26},
79 {MODULE_UART6, "/soc/aips-bus@02100000/serial@021fc000", 0x440, 26},
80 {MODULE_UART7, "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000", 0x440, 26},
81 {MODULE_UART8, "/soc/aips-bus@02200000/serial@02288000", 0x440, 26},
82 {MODULE_PWM5, "/soc/aips-bus@02000000/pwm@020f0000", 0x440, 27},
83 {MODULE_PWM6, "/soc/aips-bus@02000000/pwm@020f4000", 0x440, 27},
84 {MODULE_PWM7, "/soc/aips-bus@02000000/pwm@020f8000", 0x440, 27},
85 {MODULE_PWM8, "/soc/aips-bus@02000000/pwm@020fc000", 0x440, 27},
86 {MODULE_ECSPI3, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000", 0x440, 28},
87 {MODULE_ECSPI4, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000", 0x440, 28},
88 {MODULE_I2C3, "/soc/aips-bus@02100000/i2c@021a8000", 0x440, 29},
89 {MODULE_I2C4, "/soc/aips-bus@02100000/i2c@021f8000", 0x440, 29},
90 {MODULE_GPT2, "/soc/aips-bus@02000000/gpt@020e8000", 0x440, 30},
91 {MODULE_EPIT2, "/soc/aips-bus@02000000/epit@020d4000", 0x440, 31},
92#elif defined(CONFIG_MX6UL)
93 {MODULE_TSC, "/soc/aips-bus@2000000/tsc@2040000", 0x430, 22},
94 {MODULE_ADC2, "/soc/aips-bus@2100000/adc@219c000", 0x430, 23},
95 {MODULE_SIM1, "/soc/aips-bus@2100000/sim@218c000", 0x430, 24},
96 {MODULE_SIM2, "/soc/aips-bus@2100000/sim@21b4000", 0x430, 25},
97 {MODULE_FLEXCAN1, "/soc/aips-bus@2000000/can@2090000", 0x430, 26},
98 {MODULE_FLEXCAN2, "/soc/aips-bus@2000000/can@2094000", 0x430, 27},
99 {MODULE_SPDIF, "/soc/aips-bus@2000000/spba-bus@2000000/spdif@2004000", 0x440, 2},
100 {MODULE_EIM, "/soc/aips-bus@2100000/weim@21b8000", 0x440, 3},
101 {MODULE_SD1, "/soc/aips-bus@2100000/usdhc@2190000", 0x440, 4},
102 {MODULE_SD2, "/soc/aips-bus@2100000/usdhc@2194000", 0x440, 5},
103 {MODULE_QSPI1, "/soc/aips-bus@2100000/qspi@21e0000", 0x440, 6},
104 {MODULE_GPMI, "/soc/gpmi-nand@1806000", 0x440, 7},
105 {MODULE_APBHDMA, "/soc/dma-apbh@1804000", 0x440, 7},
106 {MODULE_LCDIF, "/soc/aips-bus@2100000/lcdif@21c8000", 0x440, 8},
107 {MODULE_PXP, "/soc/aips-bus@2100000/pxp@21cc000", 0x440, 9},
108 {MODULE_CSI, "/soc/aips-bus@2100000/csi@21c4000", 0x440, 10},
109 {MODULE_ADC1, "/soc/aips-bus@2100000/adc@2198000", 0x440, 11},
110 {MODULE_ENET1, "/soc/aips-bus@2100000/ethernet@2188000", 0x440, 12},
111 {MODULE_ENET2, "/soc/aips-bus@2000000/ethernet@20b4000", 0x440, 13},
112 {MODULE_CAAM, "/soc/aips-bus@2100000/caam@2140000", 0x440, 14},
113 {MODULE_USB_OTG2, "/soc/aips-bus@2100000/usb@2184200", 0x440, 15},
114 {MODULE_SAI2, "/soc/aips-bus@2000000/spba-bus@2000000/sai@202c000", 0x440, 24},
115 {MODULE_SAI3, "/soc/aips-bus@2000000/spba-bus@2000000/sai@2030000", 0x440, 24},
116 {MODULE_BEE, "/soc/aips-bus@2000000/bee@2044000", 0x440, 25},
117 {MODULE_UART5, "/soc/aips-bus@2100000/serial@21f4000", 0x440, 26},
118 {MODULE_UART6, "/soc/aips-bus@2100000/serial@21fc000", 0x440, 26},
119 {MODULE_UART7, "/soc/aips-bus@2000000/spba-bus@2000000/serial@2018000", 0x440, 26},
120 {MODULE_UART8, "/soc/aips-bus@2000000/spba-bus@2000000/serial@2024000", 0x440, 26},
121 {MODULE_PWM5, "/soc/aips-bus@2000000/pwm@20f0000", 0x440, 27},
122 {MODULE_PWM6, "/soc/aips-bus@2000000/pwm@20f4000", 0x440, 27},
123 {MODULE_PWM7, "/soc/aips-bus@2000000/pwm@20f8000", 0x440, 27},
124 {MODULE_PWM8, "/soc/aips-bus@2000000/pwm@20fc000", 0x440, 27},
125 {MODULE_ECSPI3, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2010000", 0x440, 28},
126 {MODULE_ECSPI4, "/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000", 0x440, 28},
127 {MODULE_I2C3, "/soc/aips-bus@2100000/i2c@21a8000", 0x440, 29},
128 {MODULE_I2C4, "/soc/aips-bus@2100000/i2c@21f8000", 0x440, 29},
129 {MODULE_GPT2, "/soc/aips-bus@2000000/gpt@20e8000", 0x440, 30},
130 {MODULE_EPIT2, "/soc/aips-bus@2000000/epit@20d4000", 0x440, 31},
131 /* Paths for older imx tree: */
132 {MODULE_TSC, "/soc/aips-bus@02000000/tsc@02040000", 0x430, 22},
133 {MODULE_ADC2, "/soc/aips-bus@02100000/adc@0219c000", 0x430, 23},
134 {MODULE_SIM1, "/soc/aips-bus@02100000/sim@0218c000", 0x430, 24},
135 {MODULE_SIM2, "/soc/aips-bus@02100000/sim@021b4000", 0x430, 25},
136 {MODULE_FLEXCAN1, "/soc/aips-bus@02000000/can@02090000", 0x430, 26},
137 {MODULE_FLEXCAN2, "/soc/aips-bus@02000000/can@02094000", 0x430, 27},
138 {MODULE_SPDIF, "/soc/aips-bus@02000000/spba-bus@02000000/spdif@02004000", 0x440, 2},
139 {MODULE_EIM, "/soc/aips-bus@02100000/weim@021b8000", 0x440, 3},
140 {MODULE_SD1, "/soc/aips-bus@02100000/usdhc@02190000", 0x440, 4},
141 {MODULE_SD2, "/soc/aips-bus@02100000/usdhc@02194000", 0x440, 5},
142 {MODULE_QSPI1, "/soc/aips-bus@02100000/qspi@021e0000", 0x440, 6},
143 {MODULE_GPMI, "/soc/gpmi-nand@01806000", 0x440, 7},
144 {MODULE_APBHDMA, "/soc/dma-apbh@01804000", 0x440, 7},
145 {MODULE_LCDIF, "/soc/aips-bus@02100000/lcdif@021c8000", 0x440, 8},
146 {MODULE_PXP, "/soc/aips-bus@02100000/pxp@021cc000", 0x440, 9},
147 {MODULE_CSI, "/soc/aips-bus@02100000/csi@021c4000", 0x440, 10},
148 {MODULE_ADC1, "/soc/aips-bus@02100000/adc@02198000", 0x440, 11},
149 {MODULE_ENET1, "/soc/aips-bus@02100000/ethernet@02188000", 0x440, 12},
150 {MODULE_ENET2, "/soc/aips-bus@02000000/ethernet@020b4000", 0x440, 13},
151 {MODULE_CAAM, "/soc/aips-bus@02100000/caam@2140000", 0x440, 14},
152 {MODULE_USB_OTG2, "/soc/aips-bus@02100000/usb@02184200", 0x440, 15},
153 {MODULE_SAI2, "/soc/aips-bus@02000000/spba-bus@02000000/sai@0202c000", 0x440, 24},
154 {MODULE_SAI3, "/soc/aips-bus@02000000/spba-bus@02000000/sai@02030000", 0x440, 24},
155 {MODULE_BEE, "/soc/aips-bus@02000000/bee@02044000", 0x440, 25},
156 {MODULE_UART5, "/soc/aips-bus@02100000/serial@021f4000", 0x440, 26},
157 {MODULE_UART6, "/soc/aips-bus@02100000/serial@021fc000", 0x440, 26},
158 {MODULE_UART7, "/soc/aips-bus@02000000/spba-bus@02000000/serial@02018000", 0x440, 26},
159 {MODULE_UART8, "/soc/aips-bus@02000000/spba-bus@02000000/serial@02024000", 0x440, 26},
160 {MODULE_PWM5, "/soc/aips-bus@02000000/pwm@020f0000", 0x440, 27},
161 {MODULE_PWM6, "/soc/aips-bus@02000000/pwm@020f4000", 0x440, 27},
162 {MODULE_PWM7, "/soc/aips-bus@02000000/pwm@020f8000", 0x440, 27},
163 {MODULE_PWM8, "/soc/aips-bus@02000000/pwm@020fc000", 0x440, 27},
164 {MODULE_ECSPI3, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02010000", 0x440, 28},
165 {MODULE_ECSPI4, "/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000", 0x440, 28},
166 {MODULE_I2C3, "/soc/aips-bus@02100000/i2c@021a8000", 0x440, 29},
167 {MODULE_I2C4, "/soc/aips-bus@02100000/i2c@021f8000", 0x440, 29},
168 {MODULE_GPT2, "/soc/aips-bus@02000000/gpt@020e8000", 0x440, 30},
169 {MODULE_EPIT2, "/soc/aips-bus@02000000/epit@020d4000", 0x440, 31},
170#endif
171};
172
173u32 check_module_fused(enum fuse_module_type module)
174{
175 u32 i, reg;
176
177 for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) {
178 if (mx6_fuse_descs[i].module == module) {
179 reg = readl(OCOTP_BASE_ADDR +
180 mx6_fuse_descs[i].fuse_word_offset);
181 if (reg & BIT(mx6_fuse_descs[i].fuse_bit_offset))
182 return 1; /* disabled */
183 else
184 return 0; /* enabled */
185 }
186 }
187
188 return 0; /* Not has a fuse, always enabled */
189}
190
191#ifdef CONFIG_OF_SYSTEM_SETUP
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900[diff] [blame]192int ft_system_setup(void *blob, struct bd_info *bd)
Peng Fan415f8952020-05-01 22:08:34 +0800[diff] [blame]193{
194 const char *status = "disabled";
195 u32 i, reg;
196 int rc, off;
197
198 for (i = 0; i < ARRAY_SIZE(mx6_fuse_descs); i++) {
199 reg = readl(OCOTP_BASE_ADDR +
200 mx6_fuse_descs[i].fuse_word_offset);
201 if (reg & BIT(mx6_fuse_descs[i].fuse_bit_offset)) {
202 off = fdt_path_offset(blob,
203 mx6_fuse_descs[i].node_path);
204
205 if (off < 0)
206 continue; /* Not found, skip it */
207add_status:
Giulio Benetti29e00132023-04-06 18:17:13 +0200[diff] [blame]208 rc = fdt_setprop(blob, off, "status", status,
Peng Fan415f8952020-05-01 22:08:34 +0800[diff] [blame]209 strlen(status) + 1);
210 if (rc) {
211 if (rc == -FDT_ERR_NOSPACE) {
212 rc = fdt_increase_size(blob, 512);
213 if (!rc)
214 goto add_status;
215 }
216 printf("Unable to update property %s:%s, err=%s\n", mx6_fuse_descs[i].node_path, "status", fdt_strerror(rc));
217 } else {
218 printf("Modify %s disabled\n", mx6_fuse_descs[i].node_path);
219 }
220 }
221 }
222
223 return 0;
224}
225#endif
226
227u32 esdhc_fused(ulong base_addr)
228{
229 switch (base_addr) {
230 case USDHC1_BASE_ADDR:
231 return check_module_fused(MODULE_SD1);
232 case USDHC2_BASE_ADDR:
233 return check_module_fused(MODULE_SD2);
234#ifdef USDHC3_BASE_ADDR
235 case USDHC3_BASE_ADDR:
236 return check_module_fused(MODULE_SD3);
237#endif
238#ifdef USDHC4_BASE_ADDR
239 case USDHC4_BASE_ADDR:
240 return check_module_fused(MODULE_SD4);
241#endif
242 default:
243 return 0;
244 }
245}
246
247u32 ecspi_fused(ulong base_addr)
248{
249 switch (base_addr) {
250 case ECSPI1_BASE_ADDR:
251 return check_module_fused(MODULE_ECSPI1);
252 case ECSPI2_BASE_ADDR:
253 return check_module_fused(MODULE_ECSPI2);
254 case ECSPI3_BASE_ADDR:
255 return check_module_fused(MODULE_ECSPI3);
256 case ECSPI4_BASE_ADDR:
257 return check_module_fused(MODULE_ECSPI4);
258#ifdef ECSPI5_BASE_ADDR
259 case ECSPI5_BASE_ADDR:
260 return check_module_fused(MODULE_ECSPI5);
261#endif
262 default:
263 return 0;
264 }
265}
266
267u32 usb_fused(ulong base_addr)
268{
269 int i = (base_addr - USB_BASE_ADDR) / 0x200;
270
271 return check_module_fused(MODULE_USB_OTG1 + i);
272}
273
274u32 qspi_fused(ulong base_addr)
275{
276 switch (base_addr) {
277#ifdef QSPI1_BASE_ADDR
278 case QSPI1_BASE_ADDR:
279 return check_module_fused(MODULE_QSPI1);
280#endif
281
282#ifdef QSPI2_BASE_ADDR
283 case QSPI2_BASE_ADDR:
284 return check_module_fused(MODULE_QSPI2);
285#endif
286 default:
287 return 0;
288 }
289}
290
291u32 i2c_fused(ulong base_addr)
292{
293 switch (base_addr) {
294 case I2C1_BASE_ADDR:
295 return check_module_fused(MODULE_I2C1);
296 case I2C2_BASE_ADDR:
297 return check_module_fused(MODULE_I2C2);
298 case I2C3_BASE_ADDR:
299 return check_module_fused(MODULE_I2C3);
300#ifdef I2C4_BASE_ADDR
301 case I2C4_BASE_ADDR:
302 return check_module_fused(MODULE_I2C4);
303#endif
304 }
305
306 return 0;
307}
308
309u32 enet_fused(ulong base_addr)
310{
311 switch (base_addr) {
312 case ENET_BASE_ADDR:
313 return check_module_fused(MODULE_ENET1);
314#ifdef ENET2_BASE_ADDR
315 case ENET2_BASE_ADDR:
316 return check_module_fused(MODULE_ENET2);
317#endif
318 default:
319 return 0;
320 }
321}