Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / f3d40147cc9972ed7dce0c71dc6fb96022478598 / . / board / renesas / silk / qos.c
blob: 43a2989865735a02115eead4c369a494ad643855 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300[diff] [blame]2/*
3 * board/renesas/silk/qos.c
4 *
5 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Copyright (C) 2015 Cogent Embedded, Inc.
7 *
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300[diff] [blame]8 */
9
10#include <common.h>
11#include <asm/processor.h>
12#include <asm/mach-types.h>
13#include <asm/io.h>
14#include <asm/arch/rmobile.h>
15
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]16#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300[diff] [blame]17/* QoS version 0.11 */
18
19enum {
20 DBSC3_00, DBSC3_01, DBSC3_02, DBSC3_03, DBSC3_04,
21 DBSC3_05, DBSC3_06, DBSC3_07, DBSC3_08, DBSC3_09,
22 DBSC3_10, DBSC3_11, DBSC3_12, DBSC3_13, DBSC3_14,
23 DBSC3_15,
24 DBSC3_NR,
25};
26
27static u32 dbsc3_0_r_qos_addr[DBSC3_NR] = {
28 [DBSC3_00] = DBSC3_0_QOS_R0_BASE,
29 [DBSC3_01] = DBSC3_0_QOS_R1_BASE,
30 [DBSC3_02] = DBSC3_0_QOS_R2_BASE,
31 [DBSC3_03] = DBSC3_0_QOS_R3_BASE,
32 [DBSC3_04] = DBSC3_0_QOS_R4_BASE,
33 [DBSC3_05] = DBSC3_0_QOS_R5_BASE,
34 [DBSC3_06] = DBSC3_0_QOS_R6_BASE,
35 [DBSC3_07] = DBSC3_0_QOS_R7_BASE,
36 [DBSC3_08] = DBSC3_0_QOS_R8_BASE,
37 [DBSC3_09] = DBSC3_0_QOS_R9_BASE,
38 [DBSC3_10] = DBSC3_0_QOS_R10_BASE,
39 [DBSC3_11] = DBSC3_0_QOS_R11_BASE,
40 [DBSC3_12] = DBSC3_0_QOS_R12_BASE,
41 [DBSC3_13] = DBSC3_0_QOS_R13_BASE,
42 [DBSC3_14] = DBSC3_0_QOS_R14_BASE,
43 [DBSC3_15] = DBSC3_0_QOS_R15_BASE,
44};
45
46static u32 dbsc3_0_w_qos_addr[DBSC3_NR] = {
47 [DBSC3_00] = DBSC3_0_QOS_W0_BASE,
48 [DBSC3_01] = DBSC3_0_QOS_W1_BASE,
49 [DBSC3_02] = DBSC3_0_QOS_W2_BASE,
50 [DBSC3_03] = DBSC3_0_QOS_W3_BASE,
51 [DBSC3_04] = DBSC3_0_QOS_W4_BASE,
52 [DBSC3_05] = DBSC3_0_QOS_W5_BASE,
53 [DBSC3_06] = DBSC3_0_QOS_W6_BASE,
54 [DBSC3_07] = DBSC3_0_QOS_W7_BASE,
55 [DBSC3_08] = DBSC3_0_QOS_W8_BASE,
56 [DBSC3_09] = DBSC3_0_QOS_W9_BASE,
57 [DBSC3_10] = DBSC3_0_QOS_W10_BASE,
58 [DBSC3_11] = DBSC3_0_QOS_W11_BASE,
59 [DBSC3_12] = DBSC3_0_QOS_W12_BASE,
60 [DBSC3_13] = DBSC3_0_QOS_W13_BASE,
61 [DBSC3_14] = DBSC3_0_QOS_W14_BASE,
62 [DBSC3_15] = DBSC3_0_QOS_W15_BASE,
63};
64
65void qos_init(void)
66{
67 int i;
68 struct rcar_s3c *s3c;
69 struct rcar_s3c_qos *s3c_qos;
70 struct rcar_dbsc3_qos *qos_addr;
71 struct rcar_mxi *mxi;
72 struct rcar_mxi_qos *mxi_qos;
73 struct rcar_axi_qos *axi_qos;
74
75 /* DBSC DBADJ2 */
76 writel(0x20042004, DBSC3_0_DBADJ2);
77
78 /* S3C -QoS */
79 s3c = (struct rcar_s3c *)S3C_BASE;
80 writel(0x1F0D0B0A, &s3c->s3crorr);
81 writel(0x1F0D0B09, &s3c->s3cworr);
82
83 /* QoS Control Registers */
84 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI0_BASE;
85 writel(0x00890089, &s3c_qos->s3cqos0);
86 writel(0x20960010, &s3c_qos->s3cqos1);
87 writel(0x20302030, &s3c_qos->s3cqos2);
88 writel(0x20AA2200, &s3c_qos->s3cqos3);
89 writel(0x00002032, &s3c_qos->s3cqos4);
90 writel(0x20960010, &s3c_qos->s3cqos5);
91 writel(0x20302030, &s3c_qos->s3cqos6);
92 writel(0x20AA2200, &s3c_qos->s3cqos7);
93 writel(0x00002032, &s3c_qos->s3cqos8);
94
95 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_CCI1_BASE;
96 writel(0x00890089, &s3c_qos->s3cqos0);
97 writel(0x20960010, &s3c_qos->s3cqos1);
98 writel(0x20302030, &s3c_qos->s3cqos2);
99 writel(0x20AA2200, &s3c_qos->s3cqos3);
100 writel(0x00002032, &s3c_qos->s3cqos4);
101 writel(0x20960010, &s3c_qos->s3cqos5);
102 writel(0x20302030, &s3c_qos->s3cqos6);
103 writel(0x20AA2200, &s3c_qos->s3cqos7);
104 writel(0x00002032, &s3c_qos->s3cqos8);
105
106 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_MXI_BASE;
107 writel(0x80928092, &s3c_qos->s3cqos0);
108 writel(0x20960020, &s3c_qos->s3cqos1);
109 writel(0x20302030, &s3c_qos->s3cqos2);
110 writel(0x20AA20DC, &s3c_qos->s3cqos3);
111 writel(0x00002032, &s3c_qos->s3cqos4);
112 writel(0x20960020, &s3c_qos->s3cqos5);
113 writel(0x20302030, &s3c_qos->s3cqos6);
114 writel(0x20AA20DC, &s3c_qos->s3cqos7);
115 writel(0x00002032, &s3c_qos->s3cqos8);
116
117 s3c_qos = (struct rcar_s3c_qos *)S3C_QOS_AXI_BASE;
118 writel(0x00820082, &s3c_qos->s3cqos0);
119 writel(0x20960020, &s3c_qos->s3cqos1);
120 writel(0x20302030, &s3c_qos->s3cqos2);
121 writel(0x20AA20FA, &s3c_qos->s3cqos3);
122 writel(0x00002032, &s3c_qos->s3cqos4);
123 writel(0x20960020, &s3c_qos->s3cqos5);
124 writel(0x20302030, &s3c_qos->s3cqos6);
125 writel(0x20AA20FA, &s3c_qos->s3cqos7);
126 writel(0x00002032, &s3c_qos->s3cqos8);
127
128 /* DBSC -QoS */
129 /* DBSC0 - Read */
130 for (i = DBSC3_00; i < DBSC3_NR; i++) {
131 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_r_qos_addr[i];
132 writel(0x00000002, &qos_addr->dblgcnt);
133 writel(0x0000207D, &qos_addr->dbtmval0);
134 writel(0x00002053, &qos_addr->dbtmval1);
135 writel(0x0000202A, &qos_addr->dbtmval2);
136 writel(0x00001FBD, &qos_addr->dbtmval3);
137 writel(0x00000001, &qos_addr->dbrqctr);
138 writel(0x00002064, &qos_addr->dbthres0);
139 writel(0x0000203E, &qos_addr->dbthres1);
140 writel(0x00002019, &qos_addr->dbthres2);
141 writel(0x00000001, &qos_addr->dblgqon);
142 }
143
144 /* DBSC0 - Write */
145 for (i = DBSC3_00; i < DBSC3_NR; i++) {
146 qos_addr = (struct rcar_dbsc3_qos *)dbsc3_0_w_qos_addr[i];
147 writel(0x00000002, &qos_addr->dblgcnt);
148 writel(0x0000207D, &qos_addr->dbtmval0);
149 writel(0x00002053, &qos_addr->dbtmval1);
150 writel(0x00002043, &qos_addr->dbtmval2);
151 writel(0x00002030, &qos_addr->dbtmval3);
152 writel(0x00000001, &qos_addr->dbrqctr);
153 writel(0x00002064, &qos_addr->dbthres0);
154 writel(0x0000203E, &qos_addr->dbthres1);
155 writel(0x00002031, &qos_addr->dbthres2);
156 writel(0x00000001, &qos_addr->dblgqon);
157 }
158
159 /* CCI-400 -QoS */
160 writel(0x20000800, CCI_400_MAXOT_1);
161 writel(0x20000800, CCI_400_MAXOT_2);
162 writel(0x0000000C, CCI_400_QOSCNTL_1);
163 writel(0x0000000C, CCI_400_QOSCNTL_2);
164
165 /* MXI -QoS */
166 /* Transaction Control (MXI) */
167 mxi = (struct rcar_mxi *)MXI_BASE;
168 writel(0x00000013, &mxi->mxrtcr);
169 writel(0x00000013, &mxi->mxwtcr);
170 writel(0x00780080, &mxi->mxsaar0);
171 writel(0x02000800, &mxi->mxsaar1);
172
173 /* QoS Control (MXI) */
174 mxi_qos = (struct rcar_mxi_qos *)MXI_QOS_BASE;
175 writel(0x0000000C, &mxi_qos->vspdu0);
176 writel(0x0000000E, &mxi_qos->du0);
177
178 /* AXI -QoS */
179 /* Transaction Control (MXI) */
180 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SYX64TO128_BASE;
181 writel(0x00000002, &axi_qos->qosconf);
182 writel(0x00002245, &axi_qos->qosctset0);
183 writel(0x00002096, &axi_qos->qosctset1);
184 writel(0x00002030, &axi_qos->qosctset2);
185 writel(0x00002030, &axi_qos->qosctset3);
186 writel(0x00000001, &axi_qos->qosreqctr);
187 writel(0x00002064, &axi_qos->qosthres0);
188 writel(0x00002004, &axi_qos->qosthres1);
189 writel(0x00000000, &axi_qos->qosthres2);
190 writel(0x00000001, &axi_qos->qosqon);
191
192 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AVB_BASE;
193 writel(0x00000000, &axi_qos->qosconf);
194 writel(0x000020A6, &axi_qos->qosctset0);
195 writel(0x00000001, &axi_qos->qosreqctr);
196 writel(0x00002064, &axi_qos->qosthres0);
197 writel(0x00002004, &axi_qos->qosthres1);
198 writel(0x00000000, &axi_qos->qosthres2);
199 writel(0x00000001, &axi_qos->qosqon);
200
201 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX0_BASE;
202 writel(0x00000002, &axi_qos->qosconf);
203 writel(0x00002245, &axi_qos->qosctset0);
204 writel(0x00002096, &axi_qos->qosctset1);
205 writel(0x00002030, &axi_qos->qosctset2);
206 writel(0x00002030, &axi_qos->qosctset3);
207 writel(0x00000001, &axi_qos->qosreqctr);
208 writel(0x00002064, &axi_qos->qosthres0);
209 writel(0x00002004, &axi_qos->qosthres1);
210 writel(0x00000000, &axi_qos->qosthres2);
211 writel(0x00000001, &axi_qos->qosqon);
212
213 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX1_BASE;
214 writel(0x00000002, &axi_qos->qosconf);
215 writel(0x00002245, &axi_qos->qosctset0);
216 writel(0x00002096, &axi_qos->qosctset1);
217 writel(0x00002030, &axi_qos->qosctset2);
218 writel(0x00002030, &axi_qos->qosctset3);
219 writel(0x00000001, &axi_qos->qosreqctr);
220 writel(0x00002064, &axi_qos->qosthres0);
221 writel(0x00002004, &axi_qos->qosthres1);
222 writel(0x00000000, &axi_qos->qosthres2);
223 writel(0x00000001, &axi_qos->qosqon);
224
225 axi_qos = (struct rcar_axi_qos *)SYS_AXI_IMUX2_BASE;
226 writel(0x00000002, &axi_qos->qosconf);
227 writel(0x00002245, &axi_qos->qosctset0);
228 writel(0x00002096, &axi_qos->qosctset1);
229 writel(0x00002030, &axi_qos->qosctset2);
230 writel(0x00002030, &axi_qos->qosctset3);
231 writel(0x00000001, &axi_qos->qosreqctr);
232 writel(0x00002064, &axi_qos->qosthres0);
233 writel(0x00002004, &axi_qos->qosthres1);
234 writel(0x00000000, &axi_qos->qosthres2);
235 writel(0x00000001, &axi_qos->qosqon);
236
237 axi_qos = (struct rcar_axi_qos *)SYS_AXI_LBS_BASE;
238 writel(0x00000000, &axi_qos->qosconf);
239 writel(0x0000214C, &axi_qos->qosctset0);
240 writel(0x00000001, &axi_qos->qosreqctr);
241 writel(0x00002064, &axi_qos->qosthres0);
242 writel(0x00002004, &axi_qos->qosthres1);
243 writel(0x00000000, &axi_qos->qosthres2);
244 writel(0x00000001, &axi_qos->qosqon);
245
246 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUDS_BASE;
247 writel(0x00000001, &axi_qos->qosconf);
248 writel(0x00002004, &axi_qos->qosctset0);
249 writel(0x00002096, &axi_qos->qosctset1);
250 writel(0x00002030, &axi_qos->qosctset2);
251 writel(0x00002030, &axi_qos->qosctset3);
252 writel(0x00000001, &axi_qos->qosreqctr);
253 writel(0x00002064, &axi_qos->qosthres0);
254 writel(0x00002004, &axi_qos->qosthres1);
255 writel(0x00000000, &axi_qos->qosthres2);
256 writel(0x00000001, &axi_qos->qosqon);
257
258 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUM_BASE;
259 writel(0x00000001, &axi_qos->qosconf);
260 writel(0x00002004, &axi_qos->qosctset0);
261 writel(0x00002096, &axi_qos->qosctset1);
262 writel(0x00002030, &axi_qos->qosctset2);
263 writel(0x00002030, &axi_qos->qosctset3);
264 writel(0x00000001, &axi_qos->qosreqctr);
265 writel(0x00002064, &axi_qos->qosthres0);
266 writel(0x00002004, &axi_qos->qosthres1);
267 writel(0x00000000, &axi_qos->qosthres2);
268 writel(0x00000001, &axi_qos->qosqon);
269
270 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS0_BASE;
271 writel(0x00000001, &axi_qos->qosconf);
272 writel(0x00002004, &axi_qos->qosctset0);
273 writel(0x00002096, &axi_qos->qosctset1);
274 writel(0x00002030, &axi_qos->qosctset2);
275 writel(0x00002030, &axi_qos->qosctset3);
276 writel(0x00000001, &axi_qos->qosreqctr);
277 writel(0x00002064, &axi_qos->qosthres0);
278 writel(0x00002004, &axi_qos->qosthres1);
279 writel(0x00000000, &axi_qos->qosthres2);
280 writel(0x00000001, &axi_qos->qosqon);
281
282 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MMUS1_BASE;
283 writel(0x00000001, &axi_qos->qosconf);
284 writel(0x00002004, &axi_qos->qosctset0);
285 writel(0x00002096, &axi_qos->qosctset1);
286 writel(0x00002030, &axi_qos->qosctset2);
287 writel(0x00002030, &axi_qos->qosctset3);
288 writel(0x00000001, &axi_qos->qosreqctr);
289 writel(0x00002064, &axi_qos->qosthres0);
290 writel(0x00002004, &axi_qos->qosthres1);
291 writel(0x00000000, &axi_qos->qosthres2);
292 writel(0x00000001, &axi_qos->qosqon);
293
294 axi_qos = (struct rcar_axi_qos *)SYS_AXI_RTX_BASE;
295 writel(0x00000002, &axi_qos->qosconf);
296 writel(0x00002245, &axi_qos->qosctset0);
297 writel(0x00002096, &axi_qos->qosctset1);
298 writel(0x00002030, &axi_qos->qosctset2);
299 writel(0x00002030, &axi_qos->qosctset3);
300 writel(0x00000001, &axi_qos->qosreqctr);
301 writel(0x00002064, &axi_qos->qosthres0);
302 writel(0x00002004, &axi_qos->qosthres1);
303 writel(0x00000000, &axi_qos->qosthres2);
304 writel(0x00000001, &axi_qos->qosqon);
305
306 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS0_BASE;
307 writel(0x00000000, &axi_qos->qosconf);
308 writel(0x000020A6, &axi_qos->qosctset0);
309 writel(0x00000001, &axi_qos->qosreqctr);
310 writel(0x00002064, &axi_qos->qosthres0);
311 writel(0x00002004, &axi_qos->qosthres1);
312 writel(0x00000000, &axi_qos->qosthres2);
313 writel(0x00000001, &axi_qos->qosqon);
314
315 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDS1_BASE;
316 writel(0x00000000, &axi_qos->qosconf);
317 writel(0x000020A6, &axi_qos->qosctset0);
318 writel(0x00000001, &axi_qos->qosreqctr);
319 writel(0x00002064, &axi_qos->qosthres0);
320 writel(0x00002004, &axi_qos->qosthres1);
321 writel(0x00000000, &axi_qos->qosthres2);
322 writel(0x00000001, &axi_qos->qosqon);
323
324 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB20_BASE;
325 writel(0x00000000, &axi_qos->qosconf);
326 writel(0x00002053, &axi_qos->qosctset0);
327 writel(0x00000001, &axi_qos->qosreqctr);
328 writel(0x00002064, &axi_qos->qosthres0);
329 writel(0x00002004, &axi_qos->qosthres1);
330 writel(0x00000000, &axi_qos->qosthres2);
331 writel(0x00000001, &axi_qos->qosqon);
332
333 axi_qos = (struct rcar_axi_qos *)SYS_AXI_USB22_BASE;
334 writel(0x00000000, &axi_qos->qosconf);
335 writel(0x00002053, &axi_qos->qosctset0);
336 writel(0x00000001, &axi_qos->qosreqctr);
337 writel(0x00002064, &axi_qos->qosthres0);
338 writel(0x00002004, &axi_qos->qosthres1);
339 writel(0x00000000, &axi_qos->qosthres2);
340 writel(0x00000001, &axi_qos->qosqon);
341
342 axi_qos = (struct rcar_axi_qos *)SYS_AXI_AX2M_BASE;
343 writel(0x00000002, &axi_qos->qosconf);
344 writel(0x00002245, &axi_qos->qosctset0);
345 writel(0x00000001, &axi_qos->qosreqctr);
346 writel(0x00002064, &axi_qos->qosthres0);
347 writel(0x00002004, &axi_qos->qosthres1);
348 writel(0x00000000, &axi_qos->qosthres2);
349 writel(0x00000001, &axi_qos->qosqon);
350
351 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CC50_BASE;
352 writel(0x00000000, &axi_qos->qosconf);
353 writel(0x00002029, &axi_qos->qosctset0);
354 writel(0x00000001, &axi_qos->qosreqctr);
355 writel(0x00002064, &axi_qos->qosthres0);
356 writel(0x00002004, &axi_qos->qosthres1);
357 writel(0x00000000, &axi_qos->qosthres2);
358 writel(0x00000001, &axi_qos->qosqon);
359
360 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CCI_BASE;
361 writel(0x00000002, &axi_qos->qosconf);
362 writel(0x00002245, &axi_qos->qosctset0);
363 writel(0x00000001, &axi_qos->qosreqctr);
364 writel(0x00002064, &axi_qos->qosthres0);
365 writel(0x00002004, &axi_qos->qosthres1);
366 writel(0x00000000, &axi_qos->qosthres2);
367 writel(0x00000001, &axi_qos->qosqon);
368
369 axi_qos = (struct rcar_axi_qos *)SYS_AXI_CS_BASE;
370 writel(0x00000000, &axi_qos->qosconf);
371 writel(0x00002053, &axi_qos->qosctset0);
372 writel(0x00000001, &axi_qos->qosreqctr);
373 writel(0x00002064, &axi_qos->qosthres0);
374 writel(0x00002004, &axi_qos->qosthres1);
375 writel(0x00000000, &axi_qos->qosthres2);
376 writel(0x00000001, &axi_qos->qosqon);
377
378 axi_qos = (struct rcar_axi_qos *)SYS_AXI_DDM_BASE;
379 writel(0x00000000, &axi_qos->qosconf);
380 writel(0x000020A6, &axi_qos->qosctset0);
381 writel(0x00000001, &axi_qos->qosreqctr);
382 writel(0x00002064, &axi_qos->qosthres0);
383 writel(0x00002004, &axi_qos->qosthres1);
384 writel(0x00000000, &axi_qos->qosthres2);
385 writel(0x00000001, &axi_qos->qosqon);
386
387 axi_qos = (struct rcar_axi_qos *)SYS_AXI_ETH_BASE;
388 writel(0x00000000, &axi_qos->qosconf);
389 writel(0x00002053, &axi_qos->qosctset0);
390 writel(0x00000001, &axi_qos->qosreqctr);
391 writel(0x00002064, &axi_qos->qosthres0);
392 writel(0x00002004, &axi_qos->qosthres1);
393 writel(0x00000000, &axi_qos->qosthres2);
394 writel(0x00000001, &axi_qos->qosqon);
395
396 axi_qos = (struct rcar_axi_qos *)SYS_AXI_MPXM_BASE;
397 writel(0x00000002, &axi_qos->qosconf);
398 writel(0x00002245, &axi_qos->qosctset0);
399 writel(0x00000001, &axi_qos->qosreqctr);
400 writel(0x00002064, &axi_qos->qosthres0);
401 writel(0x00002004, &axi_qos->qosthres1);
402 writel(0x00000000, &axi_qos->qosthres2);
403 writel(0x00000001, &axi_qos->qosqon);
404
405 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM0_BASE;
406 writel(0x00000000, &axi_qos->qosconf);
407 writel(0x0000214C, &axi_qos->qosctset0);
408 writel(0x00000001, &axi_qos->qosreqctr);
409 writel(0x00002064, &axi_qos->qosthres0);
410 writel(0x00002004, &axi_qos->qosthres1);
411 writel(0x00000000, &axi_qos->qosthres2);
412 writel(0x00000001, &axi_qos->qosqon);
413
414 axi_qos = (struct rcar_axi_qos *)SYS_AXI_SDM1_BASE;
415 writel(0x00000000, &axi_qos->qosconf);
416 writel(0x0000214C, &axi_qos->qosctset0);
417 writel(0x00000001, &axi_qos->qosreqctr);
418 writel(0x00002064, &axi_qos->qosthres0);
419 writel(0x00002004, &axi_qos->qosthres1);
420 writel(0x00000000, &axi_qos->qosthres2);
421 writel(0x00000001, &axi_qos->qosqon);
422
423 axi_qos = (struct rcar_axi_qos *)SYS_AXI_TRAB_BASE;
424 writel(0x00000000, &axi_qos->qosconf);
425 writel(0x000020A6, &axi_qos->qosctset0);
426 writel(0x00000001, &axi_qos->qosreqctr);
427 writel(0x00002064, &axi_qos->qosthres0);
428 writel(0x00002004, &axi_qos->qosthres1);
429 writel(0x00000000, &axi_qos->qosthres2);
430 writel(0x00000001, &axi_qos->qosqon);
431
432 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM0_BASE;
433 writel(0x00000000, &axi_qos->qosconf);
434 writel(0x00002053, &axi_qos->qosctset0);
435 writel(0x00000001, &axi_qos->qosreqctr);
436 writel(0x00002064, &axi_qos->qosthres0);
437 writel(0x00002004, &axi_qos->qosthres1);
438 writel(0x00000000, &axi_qos->qosthres2);
439 writel(0x00000001, &axi_qos->qosqon);
440
441 axi_qos = (struct rcar_axi_qos *)SYS_AXI_UDM1_BASE;
442 writel(0x00000000, &axi_qos->qosconf);
443 writel(0x00002053, &axi_qos->qosctset0);
444 writel(0x00000001, &axi_qos->qosreqctr);
445 writel(0x00002064, &axi_qos->qosthres0);
446 writel(0x00002004, &axi_qos->qosthres1);
447 writel(0x00000000, &axi_qos->qosthres2);
448 writel(0x00000001, &axi_qos->qosqon);
449
450 /* QoS Register (RT-AXI) */
451 axi_qos = (struct rcar_axi_qos *)RT_AXI_SHX_BASE;
452 writel(0x00000000, &axi_qos->qosconf);
453 writel(0x00002053, &axi_qos->qosctset0);
454 writel(0x00002096, &axi_qos->qosctset1);
455 writel(0x00002030, &axi_qos->qosctset2);
456 writel(0x00002030, &axi_qos->qosctset3);
457 writel(0x00000001, &axi_qos->qosreqctr);
458 writel(0x00002064, &axi_qos->qosthres0);
459 writel(0x00002004, &axi_qos->qosthres1);
460 writel(0x00000000, &axi_qos->qosthres2);
461 writel(0x00000001, &axi_qos->qosqon);
462
463 axi_qos = (struct rcar_axi_qos *)RT_AXI_DBG_BASE;
464 writel(0x00000000, &axi_qos->qosconf);
465 writel(0x00002053, &axi_qos->qosctset0);
466 writel(0x00002096, &axi_qos->qosctset1);
467 writel(0x00002030, &axi_qos->qosctset2);
468 writel(0x00002030, &axi_qos->qosctset3);
469 writel(0x00000001, &axi_qos->qosreqctr);
470 writel(0x00002064, &axi_qos->qosthres0);
471 writel(0x00002004, &axi_qos->qosthres1);
472 writel(0x00000000, &axi_qos->qosthres2);
473 writel(0x00000001, &axi_qos->qosqon);
474
475 axi_qos = (struct rcar_axi_qos *)RT_AXI_RTX64TO128_BASE;
476 writel(0x00000002, &axi_qos->qosconf);
477 writel(0x00002245, &axi_qos->qosctset0);
478 writel(0x00002096, &axi_qos->qosctset1);
479 writel(0x00002030, &axi_qos->qosctset2);
480 writel(0x00002030, &axi_qos->qosctset3);
481 writel(0x00000001, &axi_qos->qosreqctr);
482 writel(0x00002064, &axi_qos->qosthres0);
483 writel(0x00002004, &axi_qos->qosthres1);
484 writel(0x00000000, &axi_qos->qosthres2);
485 writel(0x00000001, &axi_qos->qosqon);
486
487 axi_qos = (struct rcar_axi_qos *)RT_AXI_SY2RT_BASE;
488 writel(0x00000002, &axi_qos->qosconf);
489 writel(0x00002245, &axi_qos->qosctset0);
490 writel(0x00000001, &axi_qos->qosreqctr);
491 writel(0x00002064, &axi_qos->qosthres0);
492 writel(0x00002004, &axi_qos->qosthres1);
493 writel(0x00000000, &axi_qos->qosthres2);
494 writel(0x00000001, &axi_qos->qosqon);
495
496 /* QoS Register (MP-AXI) */
497 axi_qos = (struct rcar_axi_qos *)MP_AXI_ADSP_BASE;
498 writel(0x00000000, &axi_qos->qosconf);
499 writel(0x00002037, &axi_qos->qosctset0);
500 writel(0x00000001, &axi_qos->qosreqctr);
501 writel(0x00002064, &axi_qos->qosthres0);
502 writel(0x00002004, &axi_qos->qosthres1);
503 writel(0x00000000, &axi_qos->qosthres2);
504 writel(0x00000001, &axi_qos->qosqon);
505
506 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS0_BASE;
507 writel(0x00000001, &axi_qos->qosconf);
508 writel(0x00002014, &axi_qos->qosctset0);
509 writel(0x00000040, &axi_qos->qosreqctr);
510 writel(0x00002064, &axi_qos->qosthres0);
511 writel(0x00002004, &axi_qos->qosthres1);
512 writel(0x00000000, &axi_qos->qosthres2);
513 writel(0x00000001, &axi_qos->qosqon);
514
515 axi_qos = (struct rcar_axi_qos *)MP_AXI_ASDS1_BASE;
516 writel(0x00000001, &axi_qos->qosconf);
517 writel(0x00002014, &axi_qos->qosctset0);
518 writel(0x00000040, &axi_qos->qosreqctr);
519 writel(0x00002064, &axi_qos->qosthres0);
520 writel(0x00002004, &axi_qos->qosthres1);
521 writel(0x00000000, &axi_qos->qosthres2);
522 writel(0x00000001, &axi_qos->qosqon);
523
524 axi_qos = (struct rcar_axi_qos *)MP_AXI_MLP_BASE;
525 writel(0x00000001, &axi_qos->qosconf);
526 writel(0x00001FF0, &axi_qos->qosctset0);
527 writel(0x00000020, &axi_qos->qosreqctr);
528 writel(0x00002064, &axi_qos->qosthres0);
529 writel(0x00002004, &axi_qos->qosthres1);
530 writel(0x00002001, &axi_qos->qosthres2);
531 writel(0x00000001, &axi_qos->qosqon);
532
533 axi_qos = (struct rcar_axi_qos *)MP_AXI_MMUMP_BASE;
534 writel(0x00000001, &axi_qos->qosconf);
535 writel(0x00002004, &axi_qos->qosctset0);
536 writel(0x00002096, &axi_qos->qosctset1);
537 writel(0x00002030, &axi_qos->qosctset2);
538 writel(0x00002030, &axi_qos->qosctset3);
539 writel(0x00000001, &axi_qos->qosreqctr);
540 writel(0x00002064, &axi_qos->qosthres0);
541 writel(0x00002004, &axi_qos->qosthres1);
542 writel(0x00000000, &axi_qos->qosthres2);
543 writel(0x00000001, &axi_qos->qosqon);
544
545 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPU_BASE;
546 writel(0x00000000, &axi_qos->qosconf);
547 writel(0x00002053, &axi_qos->qosctset0);
548 writel(0x00000001, &axi_qos->qosreqctr);
549 writel(0x00002064, &axi_qos->qosthres0);
550 writel(0x00002004, &axi_qos->qosthres1);
551 writel(0x00000000, &axi_qos->qosthres2);
552 writel(0x00000001, &axi_qos->qosqon);
553
554 axi_qos = (struct rcar_axi_qos *)MP_AXI_SPUC_BASE;
555 writel(0x00000000, &axi_qos->qosconf);
556 writel(0x0000206E, &axi_qos->qosctset0);
557 writel(0x00000001, &axi_qos->qosreqctr);
558 writel(0x00002064, &axi_qos->qosthres0);
559 writel(0x00002004, &axi_qos->qosthres1);
560 writel(0x00000000, &axi_qos->qosthres2);
561 writel(0x00000001, &axi_qos->qosqon);
562
563 /* QoS Register (SYS-AXI256) */
564 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_AXI128TO256_BASE;
565 writel(0x00000002, &axi_qos->qosconf);
566 writel(0x000020EB, &axi_qos->qosctset0);
567 writel(0x00002096, &axi_qos->qosctset1);
568 writel(0x00002030, &axi_qos->qosctset2);
569 writel(0x00002030, &axi_qos->qosctset3);
570 writel(0x00000001, &axi_qos->qosreqctr);
571 writel(0x00002064, &axi_qos->qosthres0);
572 writel(0x00002004, &axi_qos->qosthres1);
573 writel(0x00000000, &axi_qos->qosthres2);
574 writel(0x00000001, &axi_qos->qosqon);
575
576 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_SYX_BASE;
577 writel(0x00000002, &axi_qos->qosconf);
578 writel(0x000020EB, &axi_qos->qosctset0);
579 writel(0x00002096, &axi_qos->qosctset1);
580 writel(0x00002030, &axi_qos->qosctset2);
581 writel(0x00002030, &axi_qos->qosctset3);
582 writel(0x00000001, &axi_qos->qosreqctr);
583 writel(0x00002064, &axi_qos->qosthres0);
584 writel(0x00002004, &axi_qos->qosthres1);
585 writel(0x00000000, &axi_qos->qosthres2);
586 writel(0x00000001, &axi_qos->qosqon);
587
588 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MPX_BASE;
589 writel(0x00000002, &axi_qos->qosconf);
590 writel(0x000020EB, &axi_qos->qosctset0);
591 writel(0x00002096, &axi_qos->qosctset1);
592 writel(0x00002030, &axi_qos->qosctset2);
593 writel(0x00002030, &axi_qos->qosctset3);
594 writel(0x00000001, &axi_qos->qosreqctr);
595 writel(0x00002064, &axi_qos->qosthres0);
596 writel(0x00002004, &axi_qos->qosthres1);
597 writel(0x00000000, &axi_qos->qosthres2);
598 writel(0x00000001, &axi_qos->qosqon);
599
600 axi_qos = (struct rcar_axi_qos *)SYS_AXI256_MXI_BASE;
601 writel(0x00000002, &axi_qos->qosconf);
602 writel(0x000020EB, &axi_qos->qosctset0);
603 writel(0x00002096, &axi_qos->qosctset1);
604 writel(0x00002030, &axi_qos->qosctset2);
605 writel(0x00002030, &axi_qos->qosctset3);
606 writel(0x00000001, &axi_qos->qosreqctr);
607 writel(0x00002064, &axi_qos->qosthres0);
608 writel(0x00002004, &axi_qos->qosthres1);
609 writel(0x00000000, &axi_qos->qosthres2);
610 writel(0x00000001, &axi_qos->qosqon);
611
612 /* QoS Register (CCI-AXI) */
613 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS0_BASE;
614 writel(0x00000001, &axi_qos->qosconf);
615 writel(0x00002004, &axi_qos->qosctset0);
616 writel(0x00002096, &axi_qos->qosctset1);
617 writel(0x00002030, &axi_qos->qosctset2);
618 writel(0x00002030, &axi_qos->qosctset3);
619 writel(0x00000001, &axi_qos->qosreqctr);
620 writel(0x00002064, &axi_qos->qosthres0);
621 writel(0x00002004, &axi_qos->qosthres1);
622 writel(0x00000000, &axi_qos->qosthres2);
623 writel(0x00000001, &axi_qos->qosqon);
624
625 axi_qos = (struct rcar_axi_qos *)CCI_AXI_SYX2_BASE;
626 writel(0x00000002, &axi_qos->qosconf);
627 writel(0x00002245, &axi_qos->qosctset0);
628 writel(0x00002096, &axi_qos->qosctset1);
629 writel(0x00002030, &axi_qos->qosctset2);
630 writel(0x00002030, &axi_qos->qosctset3);
631 writel(0x00000001, &axi_qos->qosreqctr);
632 writel(0x00002064, &axi_qos->qosthres0);
633 writel(0x00002004, &axi_qos->qosthres1);
634 writel(0x00000000, &axi_qos->qosthres2);
635 writel(0x00000001, &axi_qos->qosqon);
636
637 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUR_BASE;
638 writel(0x00000001, &axi_qos->qosconf);
639 writel(0x00002004, &axi_qos->qosctset0);
640 writel(0x00002096, &axi_qos->qosctset1);
641 writel(0x00002030, &axi_qos->qosctset2);
642 writel(0x00002030, &axi_qos->qosctset3);
643 writel(0x00000001, &axi_qos->qosreqctr);
644 writel(0x00002064, &axi_qos->qosthres0);
645 writel(0x00002004, &axi_qos->qosthres1);
646 writel(0x00000000, &axi_qos->qosthres2);
647 writel(0x00000001, &axi_qos->qosqon);
648
649 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUDS_BASE;
650 writel(0x00000001, &axi_qos->qosconf);
651 writel(0x00002004, &axi_qos->qosctset0);
652 writel(0x00002096, &axi_qos->qosctset1);
653 writel(0x00002030, &axi_qos->qosctset2);
654 writel(0x00002030, &axi_qos->qosctset3);
655 writel(0x00000001, &axi_qos->qosreqctr);
656 writel(0x00002064, &axi_qos->qosthres0);
657 writel(0x00002004, &axi_qos->qosthres1);
658 writel(0x00000000, &axi_qos->qosthres2);
659 writel(0x00000001, &axi_qos->qosqon);
660
661 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUM_BASE;
662 writel(0x00000001, &axi_qos->qosconf);
663 writel(0x00002004, &axi_qos->qosctset0);
664 writel(0x00002096, &axi_qos->qosctset1);
665 writel(0x00002030, &axi_qos->qosctset2);
666 writel(0x00002030, &axi_qos->qosctset3);
667 writel(0x00000001, &axi_qos->qosreqctr);
668 writel(0x00002064, &axi_qos->qosthres0);
669 writel(0x00002004, &axi_qos->qosthres1);
670 writel(0x00000000, &axi_qos->qosthres2);
671 writel(0x00000001, &axi_qos->qosqon);
672
673 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MXI_BASE;
674 writel(0x00000002, &axi_qos->qosconf);
675 writel(0x00002245, &axi_qos->qosctset0);
676 writel(0x00002096, &axi_qos->qosctset1);
677 writel(0x00002030, &axi_qos->qosctset2);
678 writel(0x00002030, &axi_qos->qosctset3);
679 writel(0x00000001, &axi_qos->qosreqctr);
680 writel(0x00002064, &axi_qos->qosthres0);
681 writel(0x00002004, &axi_qos->qosthres1);
682 writel(0x00000000, &axi_qos->qosthres2);
683 writel(0x00000001, &axi_qos->qosqon);
684
685 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUS1_BASE;
686 writel(0x00000001, &axi_qos->qosconf);
687 writel(0x00002004, &axi_qos->qosctset0);
688 writel(0x00002096, &axi_qos->qosctset1);
689 writel(0x00002030, &axi_qos->qosctset2);
690 writel(0x00002030, &axi_qos->qosctset3);
691 writel(0x00000001, &axi_qos->qosreqctr);
692 writel(0x00002064, &axi_qos->qosthres0);
693 writel(0x00002004, &axi_qos->qosthres1);
694 writel(0x00000000, &axi_qos->qosthres2);
695 writel(0x00000001, &axi_qos->qosqon);
696
697 axi_qos = (struct rcar_axi_qos *)CCI_AXI_MMUMP_BASE;
698 writel(0x00000001, &axi_qos->qosconf);
699 writel(0x00002004, &axi_qos->qosctset0);
700 writel(0x00002096, &axi_qos->qosctset1);
701 writel(0x00002030, &axi_qos->qosctset2);
702 writel(0x00002030, &axi_qos->qosctset3);
703 writel(0x00000001, &axi_qos->qosreqctr);
704 writel(0x00002064, &axi_qos->qosthres0);
705 writel(0x00002004, &axi_qos->qosthres1);
706 writel(0x00000000, &axi_qos->qosthres2);
707 writel(0x00000001, &axi_qos->qosqon);
708
709 /* QoS Register (Media-AXI) */
710 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXR_BASE;
711 writel(0x00000002, &axi_qos->qosconf);
712 writel(0x000020DC, &axi_qos->qosctset0);
713 writel(0x00002096, &axi_qos->qosctset1);
714 writel(0x00002030, &axi_qos->qosctset2);
715 writel(0x00002030, &axi_qos->qosctset3);
716 writel(0x00000020, &axi_qos->qosreqctr);
717 writel(0x000020AA, &axi_qos->qosthres0);
718 writel(0x00002032, &axi_qos->qosthres1);
719 writel(0x00000001, &axi_qos->qosthres2);
720
721 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_MXW_BASE;
722 writel(0x00000002, &axi_qos->qosconf);
723 writel(0x000020DC, &axi_qos->qosctset0);
724 writel(0x00002096, &axi_qos->qosctset1);
725 writel(0x00002030, &axi_qos->qosctset2);
726 writel(0x00002030, &axi_qos->qosctset3);
727 writel(0x00000020, &axi_qos->qosreqctr);
728 writel(0x000020AA, &axi_qos->qosthres0);
729 writel(0x00002032, &axi_qos->qosthres1);
730 writel(0x00000001, &axi_qos->qosthres2);
731
732 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMR_BASE;
733 writel(0x00000001, &axi_qos->qosconf);
734 writel(0x00002190, &axi_qos->qosctset0);
735 writel(0x00000020, &axi_qos->qosreqctr);
736 writel(0x00002064, &axi_qos->qosthres0);
737 writel(0x00002004, &axi_qos->qosthres1);
738 writel(0x00000001, &axi_qos->qosthres2);
739 writel(0x00000001, &axi_qos->qosqon);
740
741 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_TDMW_BASE;
742 writel(0x00000001, &axi_qos->qosconf);
743 writel(0x00002190, &axi_qos->qosctset0);
744 writel(0x00000020, &axi_qos->qosreqctr);
745 writel(0x00000001, &axi_qos->qosthres0);
746 writel(0x00000001, &axi_qos->qosthres1);
747 writel(0x00000001, &axi_qos->qosthres2);
748 writel(0x00000001, &axi_qos->qosqon);
749
750 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CR_BASE;
751 writel(0x00000001, &axi_qos->qosconf);
752 writel(0x00002190, &axi_qos->qosctset0);
753 writel(0x00000020, &axi_qos->qosreqctr);
754 writel(0x00002064, &axi_qos->qosthres0);
755 writel(0x00002004, &axi_qos->qosthres1);
756 writel(0x00000001, &axi_qos->qosthres2);
757 writel(0x00000001, &axi_qos->qosqon);
758
759 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1CW_BASE;
760 writel(0x00000001, &axi_qos->qosconf);
761 writel(0x00002190, &axi_qos->qosctset0);
762 writel(0x00000020, &axi_qos->qosreqctr);
763 writel(0x00000001, &axi_qos->qosthres0);
764 writel(0x00000001, &axi_qos->qosthres1);
765 writel(0x00000001, &axi_qos->qosthres2);
766 writel(0x00000001, &axi_qos->qosqon);
767
768 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CR_BASE;
769 writel(0x00000001, &axi_qos->qosconf);
770 writel(0x00002190, &axi_qos->qosctset0);
771 writel(0x00000020, &axi_qos->qosreqctr);
772 writel(0x00002064, &axi_qos->qosthres0);
773 writel(0x00002004, &axi_qos->qosthres1);
774 writel(0x00000001, &axi_qos->qosthres2);
775 writel(0x00000001, &axi_qos->qosqon);
776
777 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPDU0CW_BASE;
778 writel(0x00000001, &axi_qos->qosconf);
779 writel(0x00002190, &axi_qos->qosctset0);
780 writel(0x00000020, &axi_qos->qosreqctr);
781 writel(0x00000001, &axi_qos->qosthres0);
782 writel(0x00000001, &axi_qos->qosthres1);
783 writel(0x00000001, &axi_qos->qosthres2);
784 writel(0x00000001, &axi_qos->qosqon);
785
786 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VIN0W_BASE;
787 writel(0x00000001, &axi_qos->qosconf);
788 writel(0x00001FF0, &axi_qos->qosctset0);
789 writel(0x00000020, &axi_qos->qosreqctr);
790 writel(0x00002064, &axi_qos->qosthres0);
791 writel(0x00002004, &axi_qos->qosthres1);
792 writel(0x00002001, &axi_qos->qosthres2);
793 writel(0x00000001, &axi_qos->qosqon);
794
795 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0R_BASE;
796 writel(0x00000001, &axi_qos->qosconf);
797 writel(0x000020C8, &axi_qos->qosctset0);
798 writel(0x00000020, &axi_qos->qosreqctr);
799 writel(0x00002064, &axi_qos->qosthres0);
800 writel(0x00002004, &axi_qos->qosthres1);
801 writel(0x00000001, &axi_qos->qosthres2);
802 writel(0x00000001, &axi_qos->qosqon);
803
804 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_FDP0W_BASE;
805 writel(0x00000001, &axi_qos->qosconf);
806 writel(0x000020C8, &axi_qos->qosctset0);
807 writel(0x00000020, &axi_qos->qosreqctr);
808 writel(0x00000001, &axi_qos->qosthres0);
809 writel(0x00000001, &axi_qos->qosthres1);
810 writel(0x00000001, &axi_qos->qosthres2);
811 writel(0x00000001, &axi_qos->qosqon);
812
813 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSR_BASE;
814 writel(0x00000001, &axi_qos->qosconf);
815 writel(0x000020C8, &axi_qos->qosctset0);
816 writel(0x00000020, &axi_qos->qosreqctr);
817 writel(0x00002064, &axi_qos->qosthres0);
818 writel(0x00002004, &axi_qos->qosthres1);
819 writel(0x00000001, &axi_qos->qosthres2);
820 writel(0x00000001, &axi_qos->qosqon);
821
822 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMSW_BASE;
823 writel(0x00000001, &axi_qos->qosconf);
824 writel(0x000020C8, &axi_qos->qosctset0);
825 writel(0x00000020, &axi_qos->qosreqctr);
826 writel(0x00002064, &axi_qos->qosthres0);
827 writel(0x00002004, &axi_qos->qosthres1);
828 writel(0x00000001, &axi_qos->qosthres2);
829 writel(0x00000001, &axi_qos->qosqon);
830
831 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1R_BASE;
832 writel(0x00000001, &axi_qos->qosconf);
833 writel(0x000020C8, &axi_qos->qosctset0);
834 writel(0x00000020, &axi_qos->qosreqctr);
835 writel(0x00002064, &axi_qos->qosthres0);
836 writel(0x00002004, &axi_qos->qosthres1);
837 writel(0x00000001, &axi_qos->qosthres2);
838 writel(0x00000001, &axi_qos->qosqon);
839
840 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSP1W_BASE;
841 writel(0x00000001, &axi_qos->qosconf);
842 writel(0x000020C8, &axi_qos->qosctset0);
843 writel(0x00000020, &axi_qos->qosreqctr);
844 writel(0x00000001, &axi_qos->qosthres0);
845 writel(0x00000001, &axi_qos->qosthres1);
846 writel(0x00000001, &axi_qos->qosthres2);
847 writel(0x00000001, &axi_qos->qosqon);
848
849 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRR_BASE;
850 writel(0x00000001, &axi_qos->qosconf);
851 writel(0x000020C8, &axi_qos->qosctset0);
852 writel(0x00000020, &axi_qos->qosreqctr);
853 writel(0x00002064, &axi_qos->qosthres0);
854 writel(0x00002004, &axi_qos->qosthres1);
855 writel(0x00000001, &axi_qos->qosthres2);
856 writel(0x00000001, &axi_qos->qosqon);
857
858 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_IMRW_BASE;
859 writel(0x00000001, &axi_qos->qosconf);
860 writel(0x000020C8, &axi_qos->qosctset0);
861 writel(0x00000020, &axi_qos->qosreqctr);
862 writel(0x00002064, &axi_qos->qosthres0);
863 writel(0x00002004, &axi_qos->qosthres1);
864 writel(0x00000001, &axi_qos->qosthres2);
865 writel(0x00000001, &axi_qos->qosqon);
866
867 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0R_BASE;
868 writel(0x00000003, &axi_qos->qosconf);
869 writel(0x000020C8, &axi_qos->qosctset0);
870 writel(0x00002064, &axi_qos->qosthres0);
871 writel(0x00002004, &axi_qos->qosthres1);
872 writel(0x00000001, &axi_qos->qosthres2);
873 writel(0x00000001, &axi_qos->qosqon);
874
875 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VSPD0W_BASE;
876 writel(0x00000003, &axi_qos->qosconf);
877 writel(0x000020C8, &axi_qos->qosctset0);
878 writel(0x00002064, &axi_qos->qosthres0);
879 writel(0x00002004, &axi_qos->qosthres1);
880 writel(0x00000001, &axi_qos->qosthres2);
881 writel(0x00000001, &axi_qos->qosqon);
882
883 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0R_BASE;
884 writel(0x00000003, &axi_qos->qosconf);
885 writel(0x00002063, &axi_qos->qosctset0);
886 writel(0x00000001, &axi_qos->qosreqctr);
887 writel(0x00002064, &axi_qos->qosthres0);
888 writel(0x00002004, &axi_qos->qosthres1);
889 writel(0x00000001, &axi_qos->qosthres2);
890 writel(0x00000001, &axi_qos->qosqon);
891
892 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_DU0W_BASE;
893 writel(0x00000003, &axi_qos->qosconf);
894 writel(0x00002063, &axi_qos->qosctset0);
895 writel(0x00000001, &axi_qos->qosreqctr);
896 writel(0x00002064, &axi_qos->qosthres0);
897 writel(0x00002004, &axi_qos->qosthres1);
898 writel(0x00000001, &axi_qos->qosthres2);
899 writel(0x00000001, &axi_qos->qosqon);
900
901 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CR_BASE;
902 writel(0x00000001, &axi_qos->qosconf);
903 writel(0x00002073, &axi_qos->qosctset0);
904 writel(0x00000020, &axi_qos->qosreqctr);
905 writel(0x00002064, &axi_qos->qosthres0);
906 writel(0x00002004, &axi_qos->qosthres1);
907 writel(0x00000001, &axi_qos->qosthres2);
908 writel(0x00000001, &axi_qos->qosqon);
909
910 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0CW_BASE;
911 writel(0x00000001, &axi_qos->qosconf);
912 writel(0x00002073, &axi_qos->qosctset0);
913 writel(0x00000020, &axi_qos->qosreqctr);
914 writel(0x00000001, &axi_qos->qosthres0);
915 writel(0x00000001, &axi_qos->qosthres1);
916 writel(0x00000001, &axi_qos->qosthres2);
917 writel(0x00000001, &axi_qos->qosqon);
918
919 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VR_BASE;
920 writel(0x00000001, &axi_qos->qosconf);
921 writel(0x00002073, &axi_qos->qosctset0);
922 writel(0x00000020, &axi_qos->qosreqctr);
923 writel(0x00002064, &axi_qos->qosthres0);
924 writel(0x00002004, &axi_qos->qosthres1);
925 writel(0x00000001, &axi_qos->qosthres2);
926 writel(0x00000001, &axi_qos->qosqon);
927
928 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VCP0VW_BASE;
929 writel(0x00000001, &axi_qos->qosconf);
930 writel(0x00002073, &axi_qos->qosctset0);
931 writel(0x00000020, &axi_qos->qosreqctr);
932 writel(0x00000001, &axi_qos->qosthres0);
933 writel(0x00000001, &axi_qos->qosthres1);
934 writel(0x00000001, &axi_qos->qosthres2);
935 writel(0x00000001, &axi_qos->qosqon);
936
937 axi_qos = (struct rcar_axi_qos *)MEDIA_AXI_VPC0R_BASE;
938 writel(0x00000001, &axi_qos->qosconf);
939 writel(0x00002073, &axi_qos->qosctset0);
940 writel(0x00000020, &axi_qos->qosreqctr);
941 writel(0x00002064, &axi_qos->qosthres0);
942 writel(0x00002004, &axi_qos->qosthres1);
943 writel(0x00000001, &axi_qos->qosthres2);
944 writel(0x00000001, &axi_qos->qosqon);
945}
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]946#else /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */
Vladimir Barinovc8c1a3e2015-01-12 19:17:07 +0300[diff] [blame]947void qos_init(void)
948{
949}
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +0900[diff] [blame]950#endif /* CONFIG_ARCH_RMOBILE_EXTRAM_BOOT */