| Paul Burton | f5de32a | 2016-09-08 07:47:39 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2016 Imagination Technologies |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0 |
| 5 | */ |
| 6 | |
| 7 | #ifndef __BOARD_BOSTON_REGS_H__ |
| 8 | #define __BOARD_BOSTON_REGS_H__ |
| 9 | |
| 10 | #include <asm/addrspace.h> |
| 11 | |
| 12 | #define BOSTON_PLAT_BASE CKSEG1ADDR(0x17ffd000) |
| 13 | #define BOSTON_LCD_BASE CKSEG1ADDR(0x17fff000) |
| 14 | |
| 15 | /* |
| 16 | * Platform Register Definitions |
| 17 | */ |
| 18 | #define BOSTON_PLAT_CORE_CL (BOSTON_PLAT_BASE + 0x04) |
| 19 | |
| 20 | #define BOSTON_PLAT_DDR3STAT (BOSTON_PLAT_BASE + 0x14) |
| 21 | # define BOSTON_PLAT_DDR3STAT_CALIB (1 << 2) |
| 22 | |
| 23 | #define BOSTON_PLAT_DDRCONF0 (BOSTON_PLAT_BASE + 0x38) |
| 24 | # define BOSTON_PLAT_DDRCONF0_SIZE (0xf << 0) |
| 25 | |
| 26 | #endif /* __BOARD_BOSTON_REGS_H__ */ |