blob: d5663274cd13281ab3afadc3dd62f42ad8eb314f [file] [log] [blame]
Green Wan2e5da522021-05-27 06:52:13 -07001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (c) 2020-2021 SiFive, Inc
4 *
5 * Authors:
6 * Pragnesh Patel <pragnesh.patel@sifive.com>
7 */
8
9#include <init.h>
10#include <spl.h>
11#include <misc.h>
12#include <log.h>
13#include <linux/delay.h>
14#include <linux/io.h>
15#include <asm/gpio.h>
16#include <asm/arch/gpio.h>
17#include <asm/arch/spl.h>
18
Vincent Chencaeb5112021-07-08 09:08:21 +080019#define UBRDG_RESET SIFIVE_GENERIC_GPIO_NR(0, 7)
20#define ULPI_RESET SIFIVE_GENERIC_GPIO_NR(0, 9)
21#define UHUB_RESET SIFIVE_GENERIC_GPIO_NR(0, 11)
Green Wan2e5da522021-05-27 06:52:13 -070022#define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12)
23
24#define MODE_SELECT_REG 0x1000
25#define MODE_SELECT_SD 0xb
26#define MODE_SELECT_MASK GENMASK(3, 0)
27
Vincent Chen5a6def92021-07-08 09:08:20 +080028static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width)
Green Wan2e5da522021-05-27 06:52:13 -070029{
30 int ret;
31
Vincent Chen5a6def92021-07-08 09:08:20 +080032 ret = gpio_request(pin, label);
Green Wan2e5da522021-05-27 06:52:13 -070033 if (ret) {
Vincent Chen5a6def92021-07-08 09:08:20 +080034 debug("%s gpio request failed: %d\n", label, ret);
35 return ret;
36 }
37
38 ret = gpio_direction_output(pin, 1);
39 if (ret) {
40 debug("%s gpio direction set failed: %d\n", label, ret);
Green Wan2e5da522021-05-27 06:52:13 -070041 return ret;
42 }
43
Vincent Chen5a6def92021-07-08 09:08:20 +080044 udelay(1);
45
46 gpio_set_value(pin, 0);
47 udelay(low_width);
48 gpio_set_value(pin, 1);
49
50 return ret;
51}
52
53static inline int spl_gemgxl_init(void)
54{
55 int ret;
Green Wan2e5da522021-05-27 06:52:13 -070056 /*
57 * GEMGXL init VSC8541 PHY reset sequence;
58 * leave pull-down active for 2ms
59 */
60 udelay(2000);
Vincent Chen5a6def92021-07-08 09:08:20 +080061 ret = spl_reset_device_by_gpio("gem_phy_reset", GEM_PHY_RESET, 1);
62 mdelay(15);
63
64 return ret;
65}
66
Vincent Chencaeb5112021-07-08 09:08:21 +080067static inline int spl_usb_pcie_bridge_init(void)
68{
69 return spl_reset_device_by_gpio("usb_pcie_bridge_reset", UBRDG_RESET, 3000);
70}
71
72static inline int spl_usb_hub_init(void)
73{
74 return spl_reset_device_by_gpio("usb_hub_reset", UHUB_RESET, 100);
75}
76
77static inline int spl_ulpi_init(void)
78{
79 return spl_reset_device_by_gpio("ulpi_reset", ULPI_RESET, 1);
80}
81
Vincent Chen5a6def92021-07-08 09:08:20 +080082int spl_board_init_f(void)
83{
84 int ret;
85
86 ret = spl_soc_init();
Green Wan2e5da522021-05-27 06:52:13 -070087 if (ret) {
Vincent Chen5a6def92021-07-08 09:08:20 +080088 debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret);
89 goto end;
Green Wan2e5da522021-05-27 06:52:13 -070090 }
91
Vincent Chen5a6def92021-07-08 09:08:20 +080092 ret = spl_gemgxl_init();
Green Wan2e5da522021-05-27 06:52:13 -070093 if (ret) {
Vincent Chen5a6def92021-07-08 09:08:20 +080094 debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
95 goto end;
Green Wan2e5da522021-05-27 06:52:13 -070096 }
97
Vincent Chencaeb5112021-07-08 09:08:21 +080098 ret = spl_usb_pcie_bridge_init();
99 if (ret) {
100 debug("USB Bridge (ASM1042A) init failed: %d\n", ret);
101 goto end;
102 }
103
104 ret = spl_usb_hub_init();
105 if (ret) {
106 debug("USB Hub (ASM1074) init failed: %d\n", ret);
107 goto end;
108 }
109
110 ret = spl_ulpi_init();
111 if (ret) {
112 debug("USB 2.0 PHY (USB3320C) init failed: %d\n", ret);
113 goto end;
114 }
115
Vincent Chen5a6def92021-07-08 09:08:20 +0800116end:
117 return ret;
Green Wan2e5da522021-05-27 06:52:13 -0700118}
119
120u32 spl_boot_device(void)
121{
122 u32 mode_select = readl((void *)MODE_SELECT_REG);
123 u32 boot_device = mode_select & MODE_SELECT_MASK;
124
125 switch (boot_device) {
126 case MODE_SELECT_SD:
127 return BOOT_DEVICE_MMC1;
128 default:
129 debug("Unsupported boot device 0x%x but trying MMC1\n",
130 boot_device);
131 return BOOT_DEVICE_MMC1;
132 }
133}
134
135#ifdef CONFIG_SPL_LOAD_FIT
136int board_fit_config_name_match(const char *name)
137{
Zong Li288ad1f2021-07-20 14:26:08 +0800138 /* boot using first FIT config */
139 return 0;
Green Wan2e5da522021-05-27 06:52:13 -0700140}
141#endif