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git01.mediatek.com / filogic / uboot / f3c633813c2c9620553a454df65f3587981c7f75 / . / board / LaCie / netspace_v2 / netspace_v2.c
blob: 730eab7e703102f9a02880052f4b5bd7fc6c8745 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]2/*
3 * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
4 *
5 * Based on Kirkwood support:
6 * (C) Copyright 2009
7 * Marvell Semiconductor <www.marvell.com>
8 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]9 */
10
11#include <common.h>
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]12#include <command.h>
Simon Glass5e6201b2019-08-01 09:46:51 -0600[diff] [blame]13#include <env.h>
Simon Glass97589732020-05-10 11:40:02 -0600[diff] [blame]14#include <init.h>
Simon Glass0c364412019-12-28 10:44:48 -0700[diff] [blame]15#include <net.h>
Simon Glass3ba929a2020-10-30 21:38:53 -0600[diff] [blame]16#include <asm/global_data.h>
Simon Glass0ffb9d62017-05-31 19:47:48 -0600[diff] [blame]17#include <asm/mach-types.h>
Anatolij Gustschin5cf80f12011-10-29 11:31:19 +0000[diff] [blame]18#include <asm/arch/cpu.h>
Stefan Roesec2437842014-10-22 12:13:06 +0200[diff] [blame]19#include <asm/arch/soc.h>
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]20#include <asm/arch/mpp.h>
21#include <asm/arch/gpio.h>
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]22
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]23#include "netspace_v2.h"
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]24#include "../common/common.h"
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]25
26DECLARE_GLOBAL_DATA_PTR;
27
28int board_early_init_f(void)
29{
30 /* Gpio configuration */
Stefan Roesec50ab392014-10-22 12:13:11 +0200[diff] [blame]31 mvebu_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
32 NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]33
34 /* Multi-Purpose Pins Functionality configuration */
Albert ARIBAUD4d424312012-11-26 11:27:36 +0000[diff] [blame]35 static const u32 kwmpp_config[] = {
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]36 MPP0_SPI_SCn,
37 MPP1_SPI_MOSI,
38 MPP2_SPI_SCK,
39 MPP3_SPI_MISO,
40 MPP4_NF_IO6,
41 MPP5_NF_IO7,
42 MPP6_SYSRST_OUTn,
43 MPP7_GPO, /* Fan speed (bit 1) */
44 MPP8_TW_SDA,
45 MPP9_TW_SCK,
46 MPP10_UART0_TXD,
47 MPP11_UART0_RXD,
48 MPP12_GPO, /* Red led */
49 MPP14_GPIO, /* USB fuse */
50 MPP16_GPIO, /* SATA 0 power */
51 MPP17_GPIO, /* SATA 1 power */
52 MPP18_NF_IO0,
53 MPP19_NF_IO1,
54 MPP20_SATA1_ACTn,
55 MPP21_SATA0_ACTn,
56 MPP22_GPIO, /* Fan speed (bit 0) */
57 MPP23_GPIO, /* Fan power */
58 MPP24_GPIO, /* USB mode select */
59 MPP25_GPIO, /* Fan rotation fail */
60 MPP26_GPIO, /* USB vbus-in detection */
61 MPP28_GPIO, /* USB enable vbus-out */
62 MPP29_GPIO, /* Blue led (slow register) */
63 MPP30_GPIO, /* Blue led (command register) */
64 MPP31_GPIO, /* Board power off */
65 MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */
66 MPP33_GPIO, /* Fan speed (bit 2) */
67 0
68 };
Valentin Longchamp7d0d5022012-06-01 01:31:00 +0000[diff] [blame]69 kirkwood_mpp_conf(kwmpp_config, NULL);
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]70
71 return 0;
72}
73
74int board_init(void)
75{
76 /* Machine number */
77 gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
78
79 /* Boot parameters address */
Stefan Roese0b741752014-10-22 12:13:13 +0200[diff] [blame]80 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]81
82 return 0;
83}
84
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]85#if defined(CONFIG_MISC_INIT_R)
Simon Guinot6e238912011-11-08 11:31:14 +0000[diff] [blame]86int misc_init_r(void)
87{
88#if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
Simon Glass64b723f2017-08-03 12:22:12 -0600[diff] [blame]89 if (!env_get("ethaddr")) {
Simon Guinot6e238912011-11-08 11:31:14 +0000[diff] [blame]90 uchar mac[6];
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]91 if (lacie_read_mac_address(mac) == 0)
Simon Glass8551d552017-08-03 12:22:11 -0600[diff] [blame]92 eth_env_set_enetaddr("ethaddr", mac);
Simon Guinot6e238912011-11-08 11:31:14 +0000[diff] [blame]93 }
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]94#endif
Simon Guinot6e238912011-11-08 11:31:14 +0000[diff] [blame]95 return 0;
96}
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]97#endif
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]98
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]99#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]100/* Configure and initialize PHY */
101void reset_phy(void)
102{
Simon Guinot13c5ae62012-09-06 10:51:42 +0000[diff] [blame]103#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
Simon Guinotab07aa22020-06-28 19:00:31 +0200[diff] [blame]104 mv_phy_88e1318_init("ethernet-controller@72000", 0);
Simon Guinot13c5ae62012-09-06 10:51:42 +0000[diff] [blame]105#else
Simon Guinotab07aa22020-06-28 19:00:31 +0200[diff] [blame]106 mv_phy_88e1116_init("ethernet-controller@72000", 8);
Simon Guinot13c5ae62012-09-06 10:51:42 +0000[diff] [blame]107#endif
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]108}
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]109#endif
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]110
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]111#if defined(CONFIG_KIRKWOOD_GPIO)
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]112/* Return GPIO button status */
113static int
Simon Glassed38aef2020-05-10 11:40:03 -0600[diff] [blame]114do_read_button(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
Simon Guinot16311a22011-06-17 19:41:33 +0530[diff] [blame]115{
116 return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
117}
118
119U_BOOT_CMD(button, 1, 1, do_read_button,
120 "Return GPIO button status 0=off 1=on", "");
Simon Guinota35cb4c2011-11-21 19:25:47 +0530[diff] [blame]121#endif