Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 5f4f84e3755de2f96d9935fbd7e566e467a8bd20 / . / configs / ls1021atwr_qspi_defconfig
blob: b5b2cf13f923d1c780894f5235360a4aa12e24c2 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=12500000
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]4CONFIG_TARGET_LS1021ATWR=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]5CONFIG_SYS_TEXT_BASE=0x40100000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]6CONFIG_SYS_MALLOC_LEN=0x1002000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]7CONFIG_NR_DRAM_BANKS=1
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]8CONFIG_ENV_SIZE=0x2000
9CONFIG_ENV_OFFSET=0x300000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]10CONFIG_ENV_SECT_SIZE=0x10000
Tom Rini1a195882021-08-18 23:12:33 -0400[diff] [blame]11CONFIG_SYS_I2C_MXC_I2C1=y
12CONFIG_SYS_I2C_MXC_I2C2=y
13CONFIG_SYS_I2C_MXC_I2C3=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]14CONFIG_DM_GPIO=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]15CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]16CONFIG_SYS_LOAD_ADDR=0x82000000
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]17CONFIG_AHCI=y
Tom Rini9d291f42022-06-20 08:07:44 -0400[diff] [blame]18CONFIG_LAYERSCAPE_NS_ACCESS=y
Tom Rini7485ebf62022-06-20 08:07:45 -0400[diff] [blame]19CONFIG_PCIE1=y
20CONFIG_PCIE2=y
Tom Rini76fbc6f2022-04-01 10:33:18 -0400[diff] [blame]21CONFIG_SYS_MEMTEST_START=0x80000000
22CONFIG_SYS_MEMTEST_END=0x9fffffff
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]23CONFIG_DISTRO_DEFAULTS=y
Alison Wangdbb78012016-05-04 12:45:55 +0800[diff] [blame]24CONFIG_FIT=y
25CONFIG_FIT_VERBOSE=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]26CONFIG_OF_BOARD_SETUP=y
27CONFIG_OF_STDOUT_VIA_ALIAS=y
Tom Rini0d130ad2016-06-27 22:40:17 -0400[diff] [blame]28CONFIG_QSPI_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]29CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]30CONFIG_USE_BOOTARGS=y
31CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]32CONFIG_BOOTCOMMAND="run distro_bootcmd; run qspi_bootcmd; env exists secureboot && esbc_halt"
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]33CONFIG_SILENT_CONSOLE=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]34CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Tom Rinif05f9d82022-04-13 09:14:57 -0400[diff] [blame]35CONFIG_ARCH_MISC_INIT=y
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]36CONFIG_MISC_INIT_R=y
Tom Rini4abdf142021-08-17 17:59:41 -0400[diff] [blame]37CONFIG_ID_EEPROM=y
Tom Riniae17fa32022-05-11 18:01:06 -0400[diff] [blame]38CONFIG_SYS_CBSIZE=256
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]39CONFIG_SYS_PBSIZE=276
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]40CONFIG_CMD_GREPENV=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]41CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]42CONFIG_CMD_MEMINFO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]43CONFIG_CMD_MEMTEST=y
Biwen Liad6786d2021-02-05 19:02:07 +0800[diff] [blame]44CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]45CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]46CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]47CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]48CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]49# CONFIG_CMD_SETEXPR is not set
Haikun Wang3fda06e2015-06-27 21:51:05 +0530[diff] [blame]50CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]51CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]52CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]53CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinife586752022-03-11 09:12:07 -0500[diff] [blame]54CONFIG_USE_ETHPRIME=y
55CONFIG_ETHPRIME="ethernet@2d10000"
Haikun Wang3fda06e2015-06-27 21:51:05 +0530[diff] [blame]56CONFIG_DM=y
Simon Glass701ef062022-01-31 07:49:33 -0700[diff] [blame]57CONFIG_SATA=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]58CONFIG_SATA_CEVA=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]59CONFIG_FSL_CAAM=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]60CONFIG_MPC8XXX_GPIO=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]61CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame]62CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinib1b13072021-08-18 23:12:37 -0400[diff] [blame]63CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]64CONFIG_SYS_I2C_EEPROM_ADDR=0x53
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]65CONFIG_FSL_ESDHC=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]66CONFIG_MTD=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]67CONFIG_SPI_FLASH_ATMEL=y
68CONFIG_SPI_FLASH_STMICRO=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]69CONFIG_PHY_ATHEROS=y
70CONFIG_DM_ETH=y
Vladimir Oltean940bf912020-07-16 18:09:09 +0800[diff] [blame]71CONFIG_DM_MDIO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]72CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]73CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]74CONFIG_MII=y
Mario Sixda4fc932018-03-28 14:38:18 +0200[diff] [blame]75CONFIG_TSEC_ENET=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]76CONFIG_NVME_PCI=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]77CONFIG_PCI=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]78CONFIG_PCIE_LAYERSCAPE_RC=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]79CONFIG_DM_SCSI=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]80CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]81CONFIG_SPI=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]82CONFIG_DM_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]83CONFIG_FSL_DSPI=y
84CONFIG_FSL_QSPI=y
Masahiro Yamada58d00232016-06-04 07:35:03 +0900[diff] [blame]85CONFIG_USB=y
86CONFIG_USB_XHCI_HCD=y
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +0900[diff] [blame]87CONFIG_USB_XHCI_DWC3=y