Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 52b2e263a67d032be7569b2b8345b89252d91199 / . / configs / ls1021atwr_qspi_defconfig
blob: 955072eaf3609c15997cc3896446aa52af0d3349 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
2CONFIG_TARGET_LS1021ATWR=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x40100000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]4CONFIG_NR_DRAM_BANKS=1
Tom Rini56fd1e12020-11-30 12:50:32 -0500[diff] [blame]5CONFIG_SYS_MEMTEST_START=0x80000000
6CONFIG_SYS_MEMTEST_END=0x9fffffff
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]7CONFIG_ENV_SIZE=0x2000
8CONFIG_ENV_OFFSET=0x300000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]9CONFIG_ENV_SECT_SIZE=0x10000
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]10CONFIG_DM_GPIO=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart"
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]12CONFIG_AHCI=y
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]13CONFIG_DISTRO_DEFAULTS=y
Alison Wangdbb78012016-05-04 12:45:55 +0800[diff] [blame]14CONFIG_FIT=y
15CONFIG_FIT_VERBOSE=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]16CONFIG_OF_BOARD_SETUP=y
17CONFIG_OF_STDOUT_VIA_ALIAS=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]18CONFIG_SYS_EXTRA_OPTIONS="QSPI_BOOT"
Tom Rini0d130ad2016-06-27 22:40:17 -0400[diff] [blame]19CONFIG_QSPI_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]20CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]21CONFIG_USE_BOOTARGS=y
22CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0"
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]23# CONFIG_USE_BOOTCOMMAND is not set
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]24CONFIG_SILENT_CONSOLE=y
Simon Glass9fd2a022016-10-17 20:12:37 -0600[diff] [blame]25CONFIG_SYS_CONSOLE_IS_IN_ENV=y
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]26CONFIG_MISC_INIT_R=y
Tom Rini4abdf142021-08-17 17:59:41 -0400[diff] [blame]27CONFIG_ID_EEPROM=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]28CONFIG_CMD_GREPENV=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]29CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]30CONFIG_CMD_MEMINFO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]31CONFIG_CMD_MEMTEST=y
Biwen Liad6786d2021-02-05 19:02:07 +0800[diff] [blame]32CONFIG_CMD_GPIO=y
Tom Rini3c0d7a22021-02-15 13:34:30 -0500[diff] [blame]33CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]34CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]35CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]36CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]37# CONFIG_CMD_SETEXPR is not set
Haikun Wang3fda06e2015-06-27 21:51:05 +0530[diff] [blame]38CONFIG_OF_CONTROL=y
Adam Ford710966e2020-07-03 06:48:56 -0500[diff] [blame]39CONFIG_ENV_OVERWRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]40CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]41CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Haikun Wang3fda06e2015-06-27 21:51:05 +0530[diff] [blame]42CONFIG_DM=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]43CONFIG_SATA_CEVA=y
Tom Rinia5c4d402017-03-01 16:51:58 -0500[diff] [blame]44CONFIG_FSL_CAAM=y
Tom Rini6bd3b142020-02-06 13:42:52 -0500[diff] [blame]45CONFIG_DM_I2C=y
Tom Rini52b2e262021-08-18 23:12:24 -0400[diff] [blame^]46CONFIG_SPL_SYS_I2C_LEGACY=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]47CONFIG_SYS_I2C_EEPROM_ADDR=0x53
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]48CONFIG_FSL_ESDHC=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]49CONFIG_MTD=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]50CONFIG_SPI_FLASH_ATMEL=y
51CONFIG_SPI_FLASH_STMICRO=y
Tom Rini2c7a8d42019-08-14 08:11:27 -0400[diff] [blame]52CONFIG_PHY_ATHEROS=y
53CONFIG_DM_ETH=y
Vladimir Oltean940bf912020-07-16 18:09:09 +0800[diff] [blame]54CONFIG_DM_MDIO=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]55CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]56CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]57CONFIG_MII=y
Mario Sixda4fc932018-03-28 14:38:18 +0200[diff] [blame]58CONFIG_TSEC_ENET=y
Tom Rinifa943162020-10-29 10:48:01 -0400[diff] [blame]59CONFIG_NVME=y
Patrick Delaunay73287092017-01-27 11:00:42 +0100[diff] [blame]60CONFIG_PCI=y
Hou Zhiqiang02f1f062020-07-09 23:31:42 +0800[diff] [blame]61CONFIG_PCIE_LAYERSCAPE_RC=y
Peng Ma99503ac2019-01-30 19:19:40 +0800[diff] [blame]62CONFIG_DM_SCSI=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]63CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]64CONFIG_SPI=y
Tom Riniafea41d2016-09-08 16:11:59 -0400[diff] [blame]65CONFIG_DM_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]66CONFIG_FSL_DSPI=y
67CONFIG_FSL_QSPI=y
Masahiro Yamada58d00232016-06-04 07:35:03 +0900[diff] [blame]68CONFIG_USB=y
69CONFIG_USB_XHCI_HCD=y
Masahiro Yamadad3b72ca2016-06-04 07:35:04 +0900[diff] [blame]70CONFIG_USB_XHCI_DWC3=y