Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 2 | /* |
Patrice Chotard | cc55116 | 2017-10-23 09:53:59 +0200 | [diff] [blame] | 3 | * Copyright (C) 2014, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics. |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_STV0991_H |
| 8 | #define __CONFIG_STV0991_H |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 9 | #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH |
Vikas Manocha | 32b9e71 | 2014-11-18 10:42:23 -0800 | [diff] [blame] | 10 | |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 11 | /* ram memory-related information */ |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 12 | #define PHYS_SDRAM_1 0x00000000 |
| 13 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 14 | #define PHYS_SDRAM_1_SIZE 0x00198000 |
| 15 | |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 16 | /* user interface */ |
Vikas Manocha | 7f34a69 | 2014-11-18 10:42:24 -0800 | [diff] [blame] | 17 | #define CONFIG_SYS_CBSIZE 1024 |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 18 | |
| 19 | /* MISC */ |
Vikas Manocha | d70864c | 2014-12-01 12:27:53 -0800 | [diff] [blame] | 20 | #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 21 | #define CONFIG_SYS_INIT_RAM_ADDR 0x00190000 |
| 22 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 23 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Bin Meng | 7557405 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 24 | /* U-Boot Load Address */ |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 25 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 26 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 27 | |
Vikas Manocha | 32b9e71 | 2014-11-18 10:42:23 -0800 | [diff] [blame] | 28 | /* GMAC related configs */ |
| 29 | |
Vikas Manocha | 32b9e71 | 2014-11-18 10:42:23 -0800 | [diff] [blame] | 30 | #define CONFIG_DW_ALTDESCRIPTOR |
Vikas Manocha | 32b9e71 | 2014-11-18 10:42:23 -0800 | [diff] [blame] | 31 | |
| 32 | /* Command support defines */ |
Vikas Manocha | 32b9e71 | 2014-11-18 10:42:23 -0800 | [diff] [blame] | 33 | #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ |
| 34 | |
Vikas Manocha | 7f34a69 | 2014-11-18 10:42:24 -0800 | [diff] [blame] | 35 | /* Misc configuration */ |
Vikas Manocha | 7f34a69 | 2014-11-18 10:42:24 -0800 | [diff] [blame] | 36 | |
Vikas Manocha | 8cc062f | 2015-07-02 18:29:41 -0700 | [diff] [blame] | 37 | /* |
| 38 | + * QSPI support |
| 39 | + */ |
| 40 | #ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */ |
Vikas Manocha | 8cc062f | 2015-07-02 18:29:41 -0700 | [diff] [blame] | 41 | #define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000 |
Vikas Manocha | 8cc062f | 2015-07-02 18:29:41 -0700 | [diff] [blame] | 42 | |
Vikas Manocha | 8cc062f | 2015-07-02 18:29:41 -0700 | [diff] [blame] | 43 | #endif |
| 44 | |
Vikas Manocha | 33913c5 | 2014-11-18 10:42:22 -0800 | [diff] [blame] | 45 | #endif /* __CONFIG_H */ |