blob: 448749a7f81d93d353c662ad555d6c50c5d5ac59 [file] [log] [blame]
Michael Walle36ba7642020-10-15 23:08:57 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2
3#ifndef __SL28_H
4#define __SL28_H
5
6#include <asm/arch/stream_id_lsch3.h>
7#include <asm/arch/config.h>
8#include <asm/arch/soc.h>
9
10/* we don't use hwconfig but this has to be defined.. */
11#define HWCONFIG_BUFFER_SIZE 256
12
13/* we don't have secure memory unless we have a BL31 */
14#ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
15#undef CONFIG_SYS_MEM_RESERVE_SECURE
16#endif
17
18/* DDR */
Michael Walle36ba7642020-10-15 23:08:57 +020019#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
20
21#define CONFIG_VERY_BIG_RAM
22#define CONFIG_CHIP_SELECTS_PER_CTRL 4
23#define CONFIG_DIMM_SLOTS_PER_CTLR 1
24#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000
25#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0
26#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
27#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
28#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 1
29
30/* early stack pointer */
31#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0)
32
Michael Walle36ba7642020-10-15 23:08:57 +020033/* SMP */
34#define CPU_RELEASE_ADDR secondary_boot_addr
35
36/* generic timer */
37#define COUNTER_FREQUENCY 25000000
38
Michael Walle36ba7642020-10-15 23:08:57 +020039/* early heap for SPL DM */
40#define CONFIG_MALLOC_F_ADDR CONFIG_SYS_FSL_OCRAM_BASE
41
42/* serial port */
Michael Walle36ba7642020-10-15 23:08:57 +020043#define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2)
Michael Walle36ba7642020-10-15 23:08:57 +020044
Tom Rini8c70baa2021-12-14 13:36:40 -050045#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
Michael Walle36ba7642020-10-15 23:08:57 +020046
Michael Walle36ba7642020-10-15 23:08:57 +020047/* ethernet */
48#define CONFIG_SYS_RX_ETH_BUFFER 8
49
50/* SPL */
51#define CONFIG_SPL_BSS_START_ADDR 0x80100000
52#define CONFIG_SPL_BSS_MAX_SIZE 0x00100000
53#define CONFIG_SPL_MAX_SIZE 0x20000
54#define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
55
56#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000
57#define CONFIG_SYS_SPL_MALLOC_START 0x80200000
58#define CONFIG_SYS_MONITOR_LEN (1024 * 1024)
59
60/* environment */
61/* see include/configs/ti_armv7_common.h */
Michael Walle36ba7642020-10-15 23:08:57 +020062#define ENV_MEM_LAYOUT_SETTINGS \
63 "loadaddr=0x82000000\0" \
64 "kernel_addr_r=0x82000000\0" \
65 "fdt_addr_r=0x88000000\0" \
66 "bootm_size=0x10000000\0" \
67 "pxefile_addr_r=0x80100000\0" \
68 "scriptaddr=0x80000000\0" \
69 "ramdisk_addr_r=0x88080000\0"
70
71#define BOOT_TARGET_DEVICES(func) \
Michael Walle36ba7642020-10-15 23:08:57 +020072 func(MMC, mmc, 0) \
Michael Walle654652a2020-12-20 22:35:13 +010073 func(MMC, mmc, 1) \
Michael Walle36ba7642020-10-15 23:08:57 +020074 func(NVME, nvme, 0) \
75 func(USB, usb, 0) \
Michael Walle101410e2021-01-08 00:08:59 +010076 func(SCSI, scsi, 0) \
Michael Walle36ba7642020-10-15 23:08:57 +020077 func(DHCP, dhcp, 0) \
78 func(PXE, pxe, 0)
79#include <config_distro_bootcmd.h>
80
81#define CONFIG_EXTRA_ENV_SETTINGS \
82 "env_addr=0x203e0004\0" \
83 "envload=env import -d -b ${env_addr}\0" \
84 "install_rcw=source 20200000\0" \
85 "fdtfile=freescale/fsl-ls1028a-kontron-sl28.dtb\0" \
Michael Walle0b132092021-11-09 14:48:51 +053086 "dfu_alt_info=sf 0:0=u-boot-bin raw 0x210000 0x1d0000;" \
87 "u-boot-env raw 0x3e0000 0x20000\0" \
Michael Walle36ba7642020-10-15 23:08:57 +020088 ENV_MEM_LAYOUT_SETTINGS \
89 BOOTENV
90
91#endif /* __SL28_H */