blob: 00b67787d9e6e7f9f46a3077656cf76dd3deb27a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Simon Glassfbff18d2014-10-07 22:01:47 -06002/*
3 * Copyright (C) 2014 Google, Inc
4 *
5 * Configuration settings for generic Exynos 5 board
Simon Glassfbff18d2014-10-07 22:01:47 -06006 */
7
8#ifndef __CONFIG_EXYNOS5_DT_COMMON_H
9#define __CONFIG_EXYNOS5_DT_COMMON_H
10
Ian Campbell3ecaa402014-11-09 10:44:32 +000011/* Console configuration */
12#undef EXYNOS_DEVICE_SETTINGS
13#define EXYNOS_DEVICE_SETTINGS \
14 "stdin=serial,cros-ec-keyb\0" \
Simon Glassa1015ad2016-02-21 21:09:01 -070015 "stdout=serial,vidconsole\0" \
16 "stderr=serial,vidconsole\0"
Ian Campbell3ecaa402014-11-09 10:44:32 +000017
Simon Glass73f6a532015-08-03 08:19:31 -060018#define CONFIG_EXYNOS5_DT
19
Patrick Delaunay5c95efb2019-02-27 15:20:34 +010020#define CONFIG_SYS_SPI_BASE 0x12D30000
Simon Glass0b18b802015-08-03 08:19:29 -060021#define FLASH_SIZE (4 << 20)
Simon Glass0b18b802015-08-03 08:19:29 -060022#define CONFIG_SPI_BOOTING
23
24#define CONFIG_BOARD_COMMON
25
26/* Display */
Simon Glass0b18b802015-08-03 08:19:29 -060027#ifdef CONFIG_LCD
28#define CONFIG_EXYNOS_FB
29#define CONFIG_EXYNOS_DP
30#define LCD_BPP LCD_COLOR16
31#endif
Simon Glassfbff18d2014-10-07 22:01:47 -060032
Simon Glassfbff18d2014-10-07 22:01:47 -060033#endif