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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Matthias Weisser82001ef2011-07-06 00:28:33 +00002/*
3 * (c) 2011 Graf-Syteco, Matthias Weisser
4 * <weisserm@arcor.de>
5 *
6 * Configuation settings for the zmx25 board
Matthias Weisser82001ef2011-07-06 00:28:33 +00007 */
8
9#ifndef __CONFIG_H
10#define __CONFIG_H
11
Rob Herringc4d1a0e2013-10-04 10:22:44 -050012#include <asm/arch/imx-regs.h>
13
Rob Herringc4d1a0e2013-10-04 10:22:44 -050014#define CONFIG_SYS_TIMER_RATE 32768
15#define CONFIG_SYS_TIMER_COUNTER \
16 (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
17
Tom Rini48157342017-01-25 20:42:35 -050018#define CONFIG_MACH_TYPE MACH_TYPE_ZMX25
Matthias Weisser82001ef2011-07-06 00:28:33 +000019/*
20 * Environment settings
21 */
22#define CONFIG_EXTRA_ENV_SETTINGS \
23 "gs_fast_boot=setenv bootdelay 5\0" \
24 "gs_slow_boot=setenv bootdelay 10\0" \
25 "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \
26 "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \
27 "bootm 0x81000000; bootelf 0x81000000\0"
28
29#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
30#define CONFIG_SETUP_MEMORY_TAGS
31#define CONFIG_INITRD_TAG
Matthias Weisser82001ef2011-07-06 00:28:33 +000032
33/*
Matthias Weisser82001ef2011-07-06 00:28:33 +000034 * Hardware drivers
35 */
36
37/*
Matthias Weisser82001ef2011-07-06 00:28:33 +000038 * Serial
39 */
40#define CONFIG_MXC_UART
Stefano Babic1ca47d92011-11-22 15:22:39 +010041#define CONFIG_MXC_UART_BASE UART2_BASE
Matthias Weisser82001ef2011-07-06 00:28:33 +000042
43/*
44 * Ethernet
45 */
46#define CONFIG_FEC_MXC
47#define CONFIG_FEC_MXC_PHYADDR 0x00
Matthias Weisser82001ef2011-07-06 00:28:33 +000048
49/*
50 * BOOTP options
51 */
52#define CONFIG_BOOTP_BOOTFILESIZE
Matthias Weisser82001ef2011-07-06 00:28:33 +000053
54/*
55 * Command line configuration.
56 */
Matthias Weisser82001ef2011-07-06 00:28:33 +000057
Matthias Weisser82001ef2011-07-06 00:28:33 +000058/*
59 * Additional command
60 */
Matthias Weisser82001ef2011-07-06 00:28:33 +000061
Matthias Weisser82001ef2011-07-06 00:28:33 +000062/*
63 * USB
64 */
65#ifdef CONFIG_CMD_USB
Matthias Weisser82001ef2011-07-06 00:28:33 +000066#define CONFIG_USB_EHCI_MXC
67#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Benoît Thébaudeaue617b3f2012-11-13 09:57:48 +000068#define CONFIG_MXC_USB_PORT 1
69#define CONFIG_MXC_USB_PORTSC MXC_EHCI_MODE_SERIAL
70#define CONFIG_MXC_USB_FLAGS (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN)
Matthias Weisser82001ef2011-07-06 00:28:33 +000071#define CONFIG_EHCI_IS_TDI
Matthias Weisser82001ef2011-07-06 00:28:33 +000072#endif /* CONFIG_CMD_USB */
73
74/* SDRAM */
Matthias Weisser82001ef2011-07-06 00:28:33 +000075#define PHYS_SDRAM 0x80000000 /* start address of LPDDRRAM */
76#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
77
78#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
79#define CONFIG_SYS_INIT_SP_ADDR 0x78020000 /* end of internal SRAM */
80
81/*
82 * FLASH and environment organization
83 */
84#define CONFIG_SYS_FLASH_BASE 0xA0000000
85#define CONFIG_SYS_MAX_FLASH_BANKS 1
86#define CONFIG_SYS_MAX_FLASH_SECT 256
87
Matthias Weisser82001ef2011-07-06 00:28:33 +000088/*
89 * CFI FLASH driver setup
90 */
Matthias Weisser82001ef2011-07-06 00:28:33 +000091
92#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE
93
94#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024))
95#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE)
96
Matthias Weisser82001ef2011-07-06 00:28:33 +000097
98/*
99 * Size of malloc() pool
100 */
101#define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000)
Matthias Weisser82001ef2011-07-06 00:28:33 +0000102
103#endif /* __CONFIG_H */